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Pepijn de Vos edited this page Nov 17, 2024 · 2 revisions

The OBUF primitive, also known as the Output Buffer, is a basic digital logic component that provides an output signal (O) from a given input signal (I). The OBUF's primary function is to buffer or isolate the output from the input, preventing any external influences on the internal workings of the subsequent circuitry.

This device is supported in Apicula.

Ports

Port Size Direction
I 1 input
O 1 output

Verilog Instantiation

OBUF obuf_inst (
    .I(I),
    .O(O)
);
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