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Pepijn de Vos edited this page Nov 19, 2024 · 4 revisions

The INV primitive is an Inverter, which takes one input bit I and produces a corresponding output bit O. The port description indicates that the input I receives data from outside the component or module, while the output O transmits the inverted value of I to external destinations. This means that the primary function of the INV primitive is to invert or flip the state of a single binary digit (bit), making it either high (1) when low (0) and vice versa.

This device is supported in Apicula

Ports

Port Size Direction
I 1 input
O 1 output

Verilog Instantiation

INV inv_inst (
    .I(I),
    .O(O)
);
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