ELVDS

ELVDS Related Components

ELVDS_IBUF

This device is supported in Apicula

Ports

Port	Size	Direction
I	1	input
IB	1	input
O	1	output

Verilog Instantiation

ELVDS_IBUF elvds_ibuf_inst (
    .I(I),
    .IB(IB),
    .O(O)
);

ELVDS_IBUF_MIPI

The ELVDS_IBUF_MIPI primitive supports both LP (Low Power) mode and HS (High Speed) mode. In LP mode, port IB is an input and port OL is an output. In HS mode, ports I and IB are differential inputs and port OH is the output data signal. Port A supports HS mode, while port B implements LP mode only, with port IB being an input and port OL being an output in this mode.

This device is not yet supported in Apicula

Ports

Port	Size	Direction
I	1	input
IB	1	input
OH	1	output
OL	1	output

Verilog Instantiation

ELVDS_IBUF_MIPI elvds_ibuf_mipi_inst (
    .I(I),
    .IB(IB),
    .OH(OH),
    .OL(OL)
);

ELVDS_IBUF_R

This device is not yet supported in Apicula

Ports

Port	Size	Direction
I	1	input
IB	1	input
O	1	output
RTEN	1	input

Verilog Instantiation

ELVDS_IBUF_R elvds_ibuf_r_inst (
    .I(I),
    .IB(IB),
    .O(O),
    .RTEN(RTEN)
);

ELVDS_IOBUF

This device is supported in Apicula

Ports

Port	Size	Direction
I	1	input
IO	1	inout
IOB	1	inout
O	1	output
OEN	1	input

Verilog Instantiation

ELVDS_IOBUF elvds_iobuf_inst (
    .I(I),
    .IO(IO),
    .IOB(IOB),
    .O(O),
    .OEN(OEN)
);

ELVDS_IOBUF_R

The Gowin ELVDS_IOBUF_R primitive is an emulated LVDS bidirectional buffer with dynamic ODT, which means it provides a bidirectional buffer that can drive or receive LVDS signals with dynamic on-the-fly switching of its output driver (ODT). This allows the primitive to adaptively switch between transmitting and receiving modes based on user-specified control inputs.

This device is not yet supported in Apicula

Ports

Port	Size	Direction
I	1	input
IO	1	inout
IOB	1	inout
O	1	output
OEN	1	input
RTEN	1	input

Verilog Instantiation

ELVDS_IOBUF_R elvds_iobuf_r_inst (
    .I(I),
    .IO(IO),
    .IOB(IOB),
    .O(O),
    .OEN(OEN),
    .RTEN(RTEN)
);

ELVDS_OBUF

This device is supported in Apicula.

Ports

Port	Size	Direction
I	1	input
O	1	output
OB	1	output

Verilog Instantiation

ELVDS_OBUF elvds_obuf_inst (
    .I(I),
    .O(O),
    .OB(OB)
);

ELVDS_TBUF

This device is supported in Apicula.

Ports

Port	Size	Direction
I	1	input
O	1	output
OB	1	output
OEN	1	input

Verilog Instantiation

ELVDS_TBUF elvds_tbuf_inst (
    .I(I),
    .O(O),
    .OB(OB),
    .OEN(OEN)
);