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Jonathan Neuschäfer edited this page Mar 16, 2021 · 2 revisions

The WPCM450 has a PECI controller, that allows it to interface with Intel chipsets directly, in order to read sensor values.

device MMIO IRQ description
PECI 0xb8000200 6 PECI controller

Registers

The register interface is very similar to the one in NPCM7xx SoCs.

offset type name description
0x00 u8 CTL_STS control and status register
0x04 u8 RD_LENGTH number of bytes to read
0x08 u8 ADDR PECI client (target) address
0x0C u8 CMD PECI command code
0x1C u8 WR_LENGTH number of bytes to write
0x40 u8 DAT_INOUT0 input/output buffer, byte 0
0x44 u8 DAT_INOUT1 input/output buffer, byte 1
... ... ...
0x7C u8 DAT_INOUTF input/output buffer, byte 15

References

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