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Secondary SPI
Jonathan Neuschäfer edited this page Jan 24, 2022
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The secondary SPI controller is simpler than the primary one (FIU).
| device | MMIO | IRQ | description |
|---|---|---|---|
| SSPI | 0xb8000300 | 31 | secondary SPI controller |
| offset | type | name | description |
|---|---|---|---|
| 0x00 | u8 | data | takes data to transmit, hold received data |
| 0x02 | u16 | control | various configuration bits |
| 0x04 | u8 | status | status bits |
| bit | mask | name | description |
|---|---|---|---|
| ... |
| bit | mask | name | description |
|---|---|---|---|
| ... |
Overview:
Basics:
Peripherals:
- Memory controller
- UART, SPI/SSPI, I2C, SD
- GPIOs and pinmux
- Ethernet
- USB, LPC, PECI, XBUS
- PWM and Tachometer, ADC
- Graphics
Board specifics: