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Merge branch 'master' into matthias/remove.128
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matthiasgoergens authored Dec 12, 2024
2 parents 4bfa097 + 35b352e commit 81bfa5b
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Showing 22 changed files with 58 additions and 139 deletions.
4 changes: 0 additions & 4 deletions Makefile.toml
Original file line number Diff line number Diff line change
Expand Up @@ -11,10 +11,6 @@ CUR_TARGET = { script = ['''
'''] }
RAYON_NUM_THREADS = "${CORE}"

[tasks.build]
# Override the default `--all-features`, that's broken, because some of our features are mutually exclusive.
args = ["build"]

[tasks.tests]
args = [
"test",
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5 changes: 1 addition & 4 deletions ceno_zkvm/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -52,12 +52,9 @@ pprof2.workspace = true
glob = "0.3"

[features]
default = ["riv32", "forbid_overflow"]
default = ["forbid_overflow"]
flamegraph = ["pprof2/flamegraph", "pprof2/criterion"]
forbid_overflow = []
non_pow2_rayon_thread = []
riv32 = []
riv64 = []

[[bench]]
harness = false
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10 changes: 5 additions & 5 deletions ceno_zkvm/src/chip_handler.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ use ff_ext::ExtensionField;
use crate::{
error::ZKVMError,
expression::{Expression, ToExpr},
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
instructions::riscv::constants::UINT_LIMBS,
};

Expand Down Expand Up @@ -34,7 +34,7 @@ pub trait RegisterChipOperations<E: ExtensionField, NR: Into<String>, N: FnOnce(
prev_ts: Expression<E>,
ts: Expression<E>,
value: RegisterExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError>;
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError>;

#[allow(clippy::too_many_arguments)]
fn register_write(
Expand All @@ -45,7 +45,7 @@ pub trait RegisterChipOperations<E: ExtensionField, NR: Into<String>, N: FnOnce(
ts: Expression<E>,
prev_values: RegisterExpr<E>,
value: RegisterExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError>;
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError>;
}

/// The common representation of a memory address.
Expand All @@ -62,7 +62,7 @@ pub trait MemoryChipOperations<E: ExtensionField, NR: Into<String>, N: FnOnce()
prev_ts: Expression<E>,
ts: Expression<E>,
value: MemoryExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError>;
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError>;

#[allow(clippy::too_many_arguments)]
fn memory_write(
Expand All @@ -73,5 +73,5 @@ pub trait MemoryChipOperations<E: ExtensionField, NR: Into<String>, N: FnOnce()
ts: Expression<E>,
prev_values: MemoryExpr<E>,
value: MemoryExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError>;
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError>;
}
10 changes: 5 additions & 5 deletions ceno_zkvm/src/chip_handler/memory.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::Expression,
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
instructions::riscv::constants::UINT_LIMBS,
structs::RAMType,
};
Expand All @@ -19,7 +19,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> MemoryChipOperation
prev_ts: Expression<E>,
ts: Expression<E>,
value: MemoryExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError> {
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError> {
self.namespace(name_fn, |cb| {
// READ (a, v, t)
let read_record = [
Expand All @@ -39,7 +39,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> MemoryChipOperation
cb.write_record(|| "write_record", RAMType::Memory, write_record)?;

// assert prev_ts < current_ts
let lt_cfg = AssertLTConfig::construct_circuit(
let lt_cfg = AssertLtConfig::construct_circuit(
cb,
|| "prev_ts < ts",
prev_ts,
Expand All @@ -61,7 +61,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> MemoryChipOperation
ts: Expression<E>,
prev_values: MemoryExpr<E>,
value: MemoryExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError> {
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError> {
self.namespace(name_fn, |cb| {
// READ (a, v, t)
let read_record = [
Expand All @@ -80,7 +80,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> MemoryChipOperation
cb.read_record(|| "read_record", RAMType::Memory, read_record)?;
cb.write_record(|| "write_record", RAMType::Memory, write_record)?;

let lt_cfg = AssertLTConfig::construct_circuit(
let lt_cfg = AssertLtConfig::construct_circuit(
cb,
|| "prev_ts < ts",
prev_ts,
Expand Down
10 changes: 5 additions & 5 deletions ceno_zkvm/src/chip_handler/register.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::{Expression, ToExpr},
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
instructions::riscv::constants::UINT_LIMBS,
structs::RAMType,
};
Expand All @@ -21,7 +21,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> RegisterChipOperati
prev_ts: Expression<E>,
ts: Expression<E>,
value: RegisterExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError> {
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError> {
self.namespace(name_fn, |cb| {
// READ (a, v, t)
let read_record = [
Expand All @@ -43,7 +43,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> RegisterChipOperati
cb.write_record(|| "write_record", RAMType::Register, write_record)?;

// assert prev_ts < current_ts
let lt_cfg = AssertLTConfig::construct_circuit(
let lt_cfg = AssertLtConfig::construct_circuit(
cb,
|| "prev_ts < ts",
prev_ts,
Expand All @@ -65,7 +65,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> RegisterChipOperati
ts: Expression<E>,
prev_values: RegisterExpr<E>,
value: RegisterExpr<E>,
) -> Result<(Expression<E>, AssertLTConfig), ZKVMError> {
) -> Result<(Expression<E>, AssertLtConfig), ZKVMError> {
assert!(register_id.expr().degree() <= 1);
self.namespace(name_fn, |cb| {
// READ (a, v, t)
Expand All @@ -87,7 +87,7 @@ impl<E: ExtensionField, NR: Into<String>, N: FnOnce() -> NR> RegisterChipOperati
cb.read_record(|| "read_record", RAMType::Register, read_record)?;
cb.write_record(|| "write_record", RAMType::Register, write_record)?;

let lt_cfg = AssertLTConfig::construct_circuit(
let lt_cfg = AssertLtConfig::construct_circuit(
cb,
|| "prev_ts < ts",
prev_ts,
Expand Down
6 changes: 3 additions & 3 deletions ceno_zkvm/src/gadgets/div.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,13 +10,13 @@ use crate::{
witness::LkMultiplicity,
};

use super::AssertLTConfig;
use super::AssertLtConfig;

/// divide gadget
#[derive(Debug, Clone)]
pub struct DivConfig<E: ExtensionField> {
pub dividend: UInt<E>,
pub r_lt: AssertLTConfig,
pub r_lt: AssertLtConfig,
pub intermediate_mul: UInt<E>,
}

Expand All @@ -35,7 +35,7 @@ impl<E: ExtensionField> DivConfig<E> {
let (dividend, intermediate_mul) =
divisor.mul_add(|| "divisor * outcome + r", cb, quotient, remainder, true)?;

let r_lt = AssertLTConfig::construct_circuit(
let r_lt = AssertLtConfig::construct_circuit(
cb,
|| "remainder < divisor",
remainder.value(),
Expand Down
4 changes: 2 additions & 2 deletions ceno_zkvm/src/gadgets/is_lt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,9 @@ use crate::{
use super::SignedExtendConfig;

#[derive(Debug, Clone)]
pub struct AssertLTConfig(InnerLtConfig);
pub struct AssertLtConfig(InnerLtConfig);

impl AssertLTConfig {
impl AssertLtConfig {
pub fn construct_circuit<
E: ExtensionField,
NR: Into<String> + Display + Clone,
Expand Down
2 changes: 1 addition & 1 deletion ceno_zkvm/src/gadgets/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ mod signed_ext;

pub use div::DivConfig;
pub use is_lt::{
AssertLTConfig, AssertSignedLtConfig, InnerLtConfig, IsLtConfig, SignedLtConfig, cal_lt_diff,
AssertLtConfig, AssertSignedLtConfig, InnerLtConfig, IsLtConfig, SignedLtConfig, cal_lt_diff,
};
pub use is_zero::{IsEqualConfig, IsZeroConfig};
pub use signed_ext::SignedExtendConfig;
4 changes: 1 addition & 3 deletions ceno_zkvm/src/instructions/riscv/constants.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,10 +14,8 @@ pub const PUBLIC_IO_IDX: usize = 6;
pub const LIMB_BITS: usize = 16;
pub const LIMB_MASK: u32 = 0xFFFF;

#[cfg(feature = "riv32")]
pub const BIT_WIDTH: usize = 32usize;
#[cfg(feature = "riv64")]
pub const BIT_WIDTH: usize = 64usize;

pub type UInt<E> = UIntLimbs<BIT_WIDTH, LIMB_BITS, E>;
pub type UIntMul<E> = UIntLimbs<{ 2 * BIT_WIDTH }, LIMB_BITS, E>;
/// use UInt<x> for x bits limb size
Expand Down
4 changes: 2 additions & 2 deletions ceno_zkvm/src/instructions/riscv/ecall/halt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::{ToExpr, WitIn},
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
instructions::{
Instruction,
riscv::{
Expand All @@ -21,7 +21,7 @@ use std::{marker::PhantomData, mem::MaybeUninit};
pub struct HaltConfig {
ecall_cfg: EcallInstructionConfig,
prev_x10_ts: WitIn,
lt_x10_cfg: AssertLTConfig,
lt_x10_cfg: AssertLtConfig,
}

pub struct HaltInstruction<E>(PhantomData<E>);
Expand Down
4 changes: 2 additions & 2 deletions ceno_zkvm/src/instructions/riscv/ecall_insn.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::{Expression, ToExpr, WitIn},
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
set_val,
tables::InsnRecord,
witness::LkMultiplicity,
Expand All @@ -18,7 +18,7 @@ pub struct EcallInstructionConfig {
pub pc: WitIn,
pub ts: WitIn,
prev_x5_ts: WitIn,
lt_x5_cfg: AssertLTConfig,
lt_x5_cfg: AssertLtConfig,
}

impl EcallInstructionConfig {
Expand Down
12 changes: 6 additions & 6 deletions ceno_zkvm/src/instructions/riscv/insn_base.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::{Expression, ToExpr, WitIn},
gadgets::AssertLTConfig,
gadgets::AssertLtConfig,
set_val,
uint::Value,
witness::LkMultiplicity,
Expand Down Expand Up @@ -77,7 +77,7 @@ impl<E: ExtensionField> StateInOut<E> {
pub struct ReadRS1<E: ExtensionField> {
pub id: WitIn,
pub prev_ts: WitIn,
pub lt_cfg: AssertLTConfig,
pub lt_cfg: AssertLtConfig,
_field_type: PhantomData<E>,
}

Expand Down Expand Up @@ -131,7 +131,7 @@ impl<E: ExtensionField> ReadRS1<E> {
pub struct ReadRS2<E: ExtensionField> {
pub id: WitIn,
pub prev_ts: WitIn,
pub lt_cfg: AssertLTConfig,
pub lt_cfg: AssertLtConfig,
_field_type: PhantomData<E>,
}

Expand Down Expand Up @@ -186,7 +186,7 @@ pub struct WriteRD<E: ExtensionField> {
pub id: WitIn,
pub prev_ts: WitIn,
pub prev_value: UInt<E>,
pub lt_cfg: AssertLTConfig,
pub lt_cfg: AssertLtConfig,
}

impl<E: ExtensionField> WriteRD<E> {
Expand Down Expand Up @@ -246,7 +246,7 @@ impl<E: ExtensionField> WriteRD<E> {
#[derive(Debug)]
pub struct ReadMEM<E: ExtensionField> {
pub prev_ts: WitIn,
pub lt_cfg: AssertLTConfig,
pub lt_cfg: AssertLtConfig,
_field_type: PhantomData<E>,
}

Expand Down Expand Up @@ -301,7 +301,7 @@ impl<E: ExtensionField> ReadMEM<E> {
#[derive(Debug)]
pub struct WriteMEM {
pub prev_ts: WitIn,
pub lt_cfg: AssertLTConfig,
pub lt_cfg: AssertLtConfig,
}

impl WriteMEM {
Expand Down
6 changes: 3 additions & 3 deletions ceno_zkvm/src/instructions/riscv/shift.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use crate::{
Value,
error::ZKVMError,
expression::{Expression, ToExpr, WitIn},
gadgets::{AssertLTConfig, SignedExtendConfig},
gadgets::{AssertLtConfig, SignedExtendConfig},
instructions::Instruction,
set_val,
};
Expand All @@ -26,7 +26,7 @@ pub struct ShiftConfig<E: ExtensionField> {
pow2_rs2_low5: WitIn,

outflow: WitIn,
assert_lt_config: AssertLTConfig,
assert_lt_config: AssertLtConfig,

// SRA
signed_extend_config: Option<SignedExtendConfig<E>>,
Expand Down Expand Up @@ -90,7 +90,7 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for ShiftLogicalInstru
let rs2_high = UInt::new(|| "rs2_high", circuit_builder)?;

let outflow = circuit_builder.create_witin(|| "outflow");
let assert_lt_config = AssertLTConfig::construct_circuit(
let assert_lt_config = AssertLtConfig::construct_circuit(
circuit_builder,
|| "outflow < pow2_rs2_low5",
outflow.expr(),
Expand Down
6 changes: 3 additions & 3 deletions ceno_zkvm/src/instructions/riscv/shift_imm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ use crate::{
circuit_builder::CircuitBuilder,
error::ZKVMError,
expression::{Expression, ToExpr, WitIn},
gadgets::{AssertLTConfig, SignedExtendConfig},
gadgets::{AssertLtConfig, SignedExtendConfig},
instructions::{
Instruction,
riscv::{constants::UInt, i_insn::IInstructionConfig},
Expand All @@ -24,7 +24,7 @@ pub struct ShiftImmConfig<E: ExtensionField> {
rs1_read: UInt<E>,
rd_written: UInt<E>,
outflow: WitIn,
assert_lt_config: AssertLTConfig,
assert_lt_config: AssertLtConfig,

// SRAI
is_lt_config: Option<SignedExtendConfig<E>>,
Expand Down Expand Up @@ -83,7 +83,7 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for ShiftImmInstructio
let rd_written = UInt::new(|| "rd_written", circuit_builder)?;

let outflow = circuit_builder.create_witin(|| "outflow");
let assert_lt_config = AssertLTConfig::construct_circuit(
let assert_lt_config = AssertLtConfig::construct_circuit(
circuit_builder,
|| "outflow < imm",
outflow.expr(),
Expand Down
6 changes: 3 additions & 3 deletions ceno_zkvm/src/scheme/mock_prover.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1213,7 +1213,7 @@ mod tests {
ROMType::U5,
error::ZKVMError,
expression::{ToExpr, WitIn},
gadgets::{AssertLTConfig, IsLtConfig},
gadgets::{AssertLtConfig, IsLtConfig},
set_val,
witness::{LkMultiplicity, RowMajorMatrix},
};
Expand Down Expand Up @@ -1357,7 +1357,7 @@ mod tests {
struct AssertLtCircuit {
pub a: WitIn,
pub b: WitIn,
pub lt_wtns: AssertLTConfig,
pub lt_wtns: AssertLtConfig,
}

struct AssertLtCircuitInput {
Expand All @@ -1369,7 +1369,7 @@ mod tests {
fn construct_circuit(cb: &mut CircuitBuilder<GoldilocksExt2>) -> Result<Self, ZKVMError> {
let a = cb.create_witin(|| "a");
let b = cb.create_witin(|| "b");
let lt_wtns = AssertLTConfig::construct_circuit(cb, || "lt", a.expr(), b.expr(), 1)?;
let lt_wtns = AssertLtConfig::construct_circuit(cb, || "lt", a.expr(), b.expr(), 1)?;
Ok(Self { a, b, lt_wtns })
}

Expand Down
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