Skip to content

Commit

Permalink
feat: Make read_bytes return how many bytes it read from the fifo and…
Browse files Browse the repository at this point in the history
… fix docs/tests
  • Loading branch information
SergioGasquez committed Jan 8, 2025
1 parent 1577668 commit bbde11e
Show file tree
Hide file tree
Showing 3 changed files with 12 additions and 23 deletions.
14 changes: 7 additions & 7 deletions esp-hal/src/uart.rs
Original file line number Diff line number Diff line change
Expand Up @@ -79,8 +79,8 @@
//! let (mut rx, mut tx) = uart1.split();
//!
//! // Each component can be used individually to interact with the UART:
//! tx.write_bytes(&[42u8]).expect("write error!");
//! let byte = rx.read_byte().expect("read error!");
//! tx.write_bytes(&[42u8]);
//! let byte = rx.read_byte();
//! # }
//! ```
//!
Expand Down Expand Up @@ -198,9 +198,8 @@
//! let serial = serial.as_mut().unwrap();
//!
//! let mut cnt = 0;
//! while let Some(_c) = serial.read_byte() {
//! cnt += 1;
//! }
//! let mut buff = [0u8; 64];
//! let cnt = serial.read_bytes(&mut buff);
//! writeln!(serial, "Read {} bytes", cnt).ok();
//!
//! let pending_interrupts = serial.interrupts();
Expand Down Expand Up @@ -865,10 +864,11 @@ where
}
}

/// Read as many bytes from the UART as the provided buffer can hold.
/// Read all available bytes from the RX FIFO into the provided buffer and
/// returns the number of read bytes.
pub fn read_bytes(&mut self, buf: &mut [u8]) -> usize {
let mut count = 0;
while count < buf.len() {
while count < buf.len() && self.rx_fifo_count() > 0 {
buf[count] = self.read_byte();
count += 1;
}
Expand Down
11 changes: 2 additions & 9 deletions hil-test/tests/uart_regression.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,21 +22,14 @@ mod tests {

let mut rx = UartRx::new(peripherals.UART1, uart::Config::default(), rx).unwrap();

// start reception
_ = rx.read_byte(); // this will just return WouldBlock

unsafe { tx.set_output_high(false, esp_hal::Internal::conjure()) };

// set up TX and send a byte
let mut tx = UartTx::new(peripherals.UART0, uart::Config::default(), tx).unwrap();

tx.flush().unwrap();
tx.flush();
tx.write_bytes(&[0x42]).unwrap();
let read = loop {
if let Some(byte) = rx.read_byte() {
break byte;
}
};
let read = rx.read_byte();

assert_eq!(read, 0x42);
}
Expand Down
10 changes: 3 additions & 7 deletions hil-test/tests/uart_tx_rx.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,13 +37,9 @@ mod tests {
fn test_send_receive(mut ctx: Context) {
let byte = [0x42];

ctx.tx.flush().unwrap();
ctx.tx.flush();
ctx.tx.write_bytes(&byte).unwrap();
let read = loop {
if let Some(byte) = ctx.rx.read_byte() {
break byte;
}
};
let read = ctx.rx.read_byte();

assert_eq!(read, 0x42);
}
Expand All @@ -53,7 +49,7 @@ mod tests {
let bytes = [0x42, 0x43, 0x44];
let mut buf = [0u8; 3];

ctx.tx.flush().unwrap();
ctx.tx.flush();
ctx.tx.write_bytes(&bytes).unwrap();

let mut bytes_read = 0;
Expand Down

0 comments on commit bbde11e

Please sign in to comment.