feat: Clippy lints

esp-hal/src/spi/master.rs

@@ -2975,14 +2975,14 @@ impl Driver {
     }
 
     fn read_byte(&self) -> u8 {
-        while (&*self).busy() {}
+        while (self).busy() {}
 
         let reg_block = self.register_block();
         u32::try_into(reg_block.w(0).read().bits()).unwrap_or_default()
     }
 
     fn write_byte(&self, word: u8) {
-        while (&*self).busy() {}
+        while (self).busy() {}
 
         self.configure_datalen(0, 1);
 

esp-hal/src/uart.rs

@@ -858,13 +858,11 @@ where
         // https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32/03-errata-description/esp32/cpu-subsequent-access-halted-when-get-interrupted.html
         cfg_if::cfg_if! {
             if #[cfg(esp32)] {
-                let byte = crate::interrupt::free(|| fifo.read().rxfifo_rd_byte().bits());
+                crate::interrupt::free(|| fifo.read().rxfifo_rd_byte().bits())
             } else {
-                let byte = fifo.read().rxfifo_rd_byte().bits();
+                fifo.read().rxfifo_rd_byte().bits()
             }
         }
-
-        byte
     }
 
     /// Read as many bytes from the UART as the provided buffer can hold.