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Revert "Stop recognizing UTF16_Encoder.encodeUTF16 methods" (2) #7578

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Dec 10, 2024
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Revert "Stop recognizing UTF16_Encoder.encodeUTF16 methods" (2) #7578

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3 changes: 3 additions & 0 deletions compiler/control/OMROptions.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -551,6 +551,8 @@ TR::OptionTable OMR::Options::_jitOptions[] = {
{"disableSIMDArrayTranslate", "O\tdisable SIMD instructions for array translate", SET_OPTION_BIT(TR_DisableSIMDArrayTranslate), "F"},
{"disableSIMDDoubleMaxMin", "O\tdisable SIMD instructions for double max min", SET_OPTION_BIT(TR_DisableSIMDDoubleMaxMin), "F"},
{"disableSIMDStringHashCode", "O\tdisable vectorized java/lang/String.hashCode implementation", SET_OPTION_BIT(TR_DisableSIMDStringHashCode), "F"},
{"disableSIMDUTF16BEEncoder", "M\tdisable inlining of SIMD UTF16 Big Endian encoder", SET_OPTION_BIT(TR_DisableSIMDUTF16BEEncoder), "F"},
{"disableSIMDUTF16LEEncoder", "M\tdisable inlining of SIMD UTF16 Little Endian encoder", SET_OPTION_BIT(TR_DisableSIMDUTF16LEEncoder), "F"},
{"disableSmartPlacementOfCodeCaches", "O\tdisable placement of code caches in memory so they are near each other and the DLLs", SET_OPTION_BIT(TR_DisableSmartPlacementOfCodeCaches), "F", NOT_IN_SUBSET},
{"disableStableAnnotations", "M\tdisable recognition of @Stable", SET_OPTION_BIT(TR_DisableStableAnnotations), "F"},
{"disableStaticFinalFieldFolding", "O\tdisable generic static final field folding", TR::Options::disableOptimization, staticFinalFieldFolding, 0, "P"},
Expand Down Expand Up @@ -593,6 +595,7 @@ TR::OptionTable OMR::Options::_jitOptions[] = {
{"disableUpgradingColdCompilations", "R\tdisable upgrading to warm those methods compiled at cold due to classLoadPhase", SET_OPTION_BIT(TR_DisableUpgradingColdCompilations), "F", NOT_IN_SUBSET},
{"disableUseDefForShadows", "I\ttemporary, disables usedef for shadows.", SET_OPTION_BIT(TR_DisableUseDefForShadows),"F"},
{"disableUseRIOnlyForLargeQSZ", "M\t", RESET_OPTION_BIT(TR_UseRIOnlyForLargeQSZ), "F", NOT_IN_SUBSET },
{"disableUTF16BEEncoder", "M\tdisable inlining of UTF16 Big Endian encoder", SET_OPTION_BIT(TR_DisableUTF16BEEncoder), "F"},
{"disableValueProfiling", "O\tdisable value profiling", SET_OPTION_BIT(TR_DisableValueProfiling), "F"},
{"disableVariablePrecisionDAA", "O\tdisable variable precision DAA optimizations", SET_OPTION_BIT(TR_DisableVariablePrecisionDAA), "F"},
{"disableVectorAPIExpansion", "M\tdisable expansion of Vector API", SET_OPTION_BIT(TR_DisableVectorAPIExpansion), "F"},
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4 changes: 2 additions & 2 deletions compiler/control/OMROptions.hpp
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Expand Up @@ -880,14 +880,14 @@ enum TR_CompilationOptions
TR_DisableSIMD = 0x00010000 + 27,
// Available = 0x00020000 + 27,
TR_DisableSIMDStringCaseConv = 0x00040000 + 27,
// Available = 0x00080000 + 27,
TR_DisableSIMDUTF16BEEncoder = 0x00080000 + 27,
TR_DisableSIMDArrayCopy = 0x00100000 + 27,
TR_CheckStructureDuringExitExtraction = 0x00200000 + 27,
TR_EnableRMODE64 = 0x00400000 + 27,
TR_EnableLocalVPSkipLowFreqBlock = 0x00800000 + 27,
TR_DisableLastITableCache = 0x01000000 + 27,
TR_StressTrampolines = 0x02000000 + 27,
// Available = 0x04000000 + 27,
TR_DisableSIMDUTF16LEEncoder = 0x04000000 + 27,
TR_DisableExitExtraction = 0x08000000 + 27,
TR_TraceExitExtraction = 0x10000000 + 27,
TR_VaryInlinerAggressivenessWithTime = 0x20000000 + 27,
Expand Down
58 changes: 52 additions & 6 deletions compiler/optimizer/ValuePropagationCommon.cpp
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Expand Up @@ -2407,6 +2407,7 @@ void OMR::ValuePropagation::generateArrayTranslateNode(TR::TreeTop *callTree,TR:
bool isISO88591Decoder = (rm == TR::sun_nio_cs_ISO_8859_1_Decoder_decodeISO8859_1);
bool isSBCSEncoder = (rm == TR::sun_nio_cs_ext_SBCS_Encoder_encodeSBCS)? true:false;
bool isSBCSDecoder = (rm == TR::sun_nio_cs_ext_SBCS_Decoder_decodeSBCS)? true:false;
bool isEncodeUtf16 = (rm == TR::sun_nio_cs_UTF16_Encoder_encodeUTF16Big || rm == TR::sun_nio_cs_UTF16_Encoder_encodeUTF16Little);

int32_t childId = callNode->getFirstArgumentIndex();
if (callNode->getChild(childId)->getType().isAddress() && callNode->getChild(childId+1)->getType().isAddress())
Expand Down Expand Up @@ -2469,7 +2470,7 @@ void OMR::ValuePropagation::generateArrayTranslateNode(TR::TreeTop *callTree,TR:
else
strideNode = TR::Node::create(callNode, TR::iconst, 0, 2);

if ( isISO88591Encoder || isAsciiEncoder || isSBCSEncoder ||
if ( isISO88591Encoder || isAsciiEncoder || isSBCSEncoder || isEncodeUtf16 ||
(rm == TR::sun_nio_cs_US_ASCII_Encoder_encodeASCII) ||
(rm == TR::sun_nio_cs_UTF_8_Encoder_encodeUTF_8))
encode = true;
Expand Down Expand Up @@ -2624,12 +2625,36 @@ void OMR::ValuePropagation::generateArrayTranslateNode(TR::TreeTop *callTree,TR:

stoppingNode = TR::Node::create(callNode,TR::iconst, 0, stopIndex);

if (isEncodeUtf16)
{
TR::SymbolReference* transformedCallSymRef =
comp()->getSymRefTab()->methodSymRefFromName(
comp()->getMethodSymbol(),
"com/ibm/jit/JITHelpers",
TR::sun_nio_cs_UTF16_Encoder_encodeUTF16Big == rm ?
"transformedEncodeUTF16Big" :
"transformedEncodeUTF16Little",
"(JJI)I",
TR::MethodSymbol::Static
);

arrayTranslateNode = TR::Node::createWithSymRef(callNode, callNode->getOpCodeValue(), 3, transformedCallSymRef);
}

arrayTranslateNode->setAndIncChild(0, src);
arrayTranslateNode->setAndIncChild(1, dst);
arrayTranslateNode->setAndIncChild(2, tableNode);
arrayTranslateNode->setAndIncChild(3, termCharNode);
arrayTranslateNode->setAndIncChild(4, len);
arrayTranslateNode->setAndIncChild(5, stoppingNode);

if (isEncodeUtf16)
{
arrayTranslateNode->setAndIncChild(2, len);
}
else
{
arrayTranslateNode->setAndIncChild(2, tableNode);
arrayTranslateNode->setAndIncChild(3, termCharNode);
arrayTranslateNode->setAndIncChild(4, len);
arrayTranslateNode->setAndIncChild(5, stoppingNode);
}

//arrayTranslateNode->setChild(5, NULL);//* do I need this? what if there are more children?*/

Expand Down Expand Up @@ -3910,8 +3935,29 @@ slowBlock-> n39n BBStart <block_10> (freq 0) (cold)
cfg->addEdge(TR::CFGEdge::createEdge(prevBlock, slowBlock, trMemory()));
cfg->addEdge(TR::CFGEdge::createEdge(slowBlock, nextBlock, trMemory()));
}
#endif /* J9_PROJECT_SPECIFIC */

static
const char* transformedTargetName (TR::RecognizedMethod rm)
{
#ifdef J9_PROJECT_SPECIFIC
switch ( rm )
{
case TR::sun_nio_cs_UTF16_Encoder_encodeUTF16Big:
return "icall com/ibm/jit/JITHelpers.transformedEncodeUTF16Big(JJI)I";

case TR::sun_nio_cs_UTF16_Encoder_encodeUTF16Little:
return "icall com/ibm/jit/JITHelpers.transformedEncodeUTF16Little(JJI)I" ;

default:
return "arraytranslate";
}
#else /* J9_PROJECT_SPECIFIC */
return "arraytranslate";
#endif /* J9_PROJECT_SPECIFIC */
}

#ifdef J9_PROJECT_SPECIFIC
/**
* Can be called from doDelayedTransformations when nodes may have been removed from the tree. Issue 6623
* https://github.com/eclipse-omr/omr/issues/6623
Expand Down Expand Up @@ -4196,7 +4242,7 @@ void OMR::ValuePropagation::transformConverterCall(TR::TreeTop *callTree)



if (!performTransformation(comp(), "%sChanging call %s [%p] to %s \n", OPT_DETAILS, callNode->getOpCode().getName(), callNode, "arraytranslate"))
if (!performTransformation(comp(), "%sChanging call %s [%p] to %s \n", OPT_DETAILS, callNode->getOpCode().getName(), callNode, transformedTargetName(rm)))
return;

TR::CFG *cfg = comp()->getFlowGraph();
Expand Down
13 changes: 13 additions & 0 deletions compiler/p/codegen/OMRCodeGenerator.cpp
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Expand Up @@ -1934,6 +1934,19 @@ bool OMR::Power::CodeGenerator::getSupportsOpCodeForAutoSIMD(TR::ILOpCode opcode
return TR::CodeGenerator::getSupportsOpCodeForAutoSIMD(&self()->comp()->target().cpu, opcode);
}

bool
OMR::Power::CodeGenerator::getSupportsEncodeUtf16LittleWithSurrogateTest()
{
return self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_PPC_HAS_VSX) &&
!self()->comp()->getOption(TR_DisableSIMDUTF16LEEncoder);
}

bool
OMR::Power::CodeGenerator::getSupportsEncodeUtf16BigWithSurrogateTest()
{
return self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_PPC_HAS_VSX) &&
!self()->comp()->getOption(TR_DisableSIMDUTF16BEEncoder);
}

void
OMR::Power::CodeGenerator::addMetaDataForLoadAddressConstantFixed(
Expand Down
4 changes: 4 additions & 0 deletions compiler/p/codegen/OMRCodeGenerator.hpp
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Expand Up @@ -289,6 +289,10 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
static bool getSupportsOpCodeForAutoSIMD(TR::CPU *cpu, TR::ILOpCode opcode);
bool getSupportsOpCodeForAutoSIMD(TR::ILOpCode opcode);

bool getSupportsEncodeUtf16LittleWithSurrogateTest();

bool getSupportsEncodeUtf16BigWithSurrogateTest();

int32_t arrayInitMinimumNumberOfBytes() {return 32;}

TR::SymbolReference &getDouble2LongSymbolReference() { return *_symRefTab->findOrCreateRuntimeHelper(TR_PPCdouble2Long); }
Expand Down
3 changes: 3 additions & 0 deletions compiler/ras/Debug.cpp
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Expand Up @@ -3830,6 +3830,9 @@ TR_Debug::getRuntimeHelperName(int32_t index)
case TR_PPCP256addNoMod: return "ECP256addNoMod_PPC";
case TR_PPCP256subNoMod: return "ECP256subNoMod_PPC";

case TR_PPCencodeUTF16Big: return "__encodeUTF16Big";
case TR_PPCencodeUTF16Little: return "__encodeUTF16Little";

case TR_PPCreferenceArrayCopy: return "__referenceArrayCopy";
case TR_PPCgeneralArrayCopy: return "__generalArrayCopy";
case TR_PPCsamplingRecompileMethod: return "__samplingRecompileMethod";
Expand Down
16 changes: 16 additions & 0 deletions compiler/x/codegen/OMRCodeGenerator.cpp
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Expand Up @@ -1189,6 +1189,22 @@ OMR::X86::CodeGenerator::getSupportsOpCodeForAutoSIMD(TR::ILOpCode opcode)
return TR::CodeGenerator::getSupportsOpCodeForAutoSIMD(&self()->comp()->target().cpu, opcode);
}

bool
OMR::X86::CodeGenerator::getSupportsEncodeUtf16LittleWithSurrogateTest()
{
TR_ASSERT_FATAL(self()->comp()->compileRelocatableCode() || self()->comp()->isOutOfProcessCompilation() || self()->comp()->compilePortableCode() || self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) == TR::CodeGenerator::getX86ProcessorInfo().supportsSSE4_1(), "supportsSSE4_1()");
return self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) &&
!self()->comp()->getOption(TR_DisableSIMDUTF16LEEncoder);
}

bool
OMR::X86::CodeGenerator::getSupportsEncodeUtf16BigWithSurrogateTest()
{
TR_ASSERT_FATAL(self()->comp()->compileRelocatableCode() || self()->comp()->isOutOfProcessCompilation() || self()->comp()->compilePortableCode() || self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) == TR::CodeGenerator::getX86ProcessorInfo().supportsSSE4_1(), "supportsSSE4_1()");
return self()->comp()->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) &&
!self()->comp()->getOption(TR_DisableSIMDUTF16BEEncoder);
}

bool
OMR::X86::CodeGenerator::getSupportsBitPermute()
{
Expand Down
3 changes: 3 additions & 0 deletions compiler/x/codegen/OMRCodeGenerator.hpp
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Expand Up @@ -404,6 +404,9 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
static bool getSupportsOpCodeForAutoSIMD(TR::CPU *cpu, TR::ILOpCode opcode);
bool getSupportsOpCodeForAutoSIMD(TR::ILOpCode opcode);

bool getSupportsEncodeUtf16LittleWithSurrogateTest();
bool getSupportsEncodeUtf16BigWithSurrogateTest();

virtual bool getSupportsBitPermute();

bool supportsNonHelper(TR::SymbolReferenceTable::CommonNonhelperSymbol symbol);
Expand Down
14 changes: 14 additions & 0 deletions compiler/z/codegen/OMRCodeGenerator.cpp
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Expand Up @@ -597,6 +597,8 @@ OMR::Z::CodeGenerator::initialize()
comp->setOption(TR_DisableAutoSIMD);
comp->setOption(TR_DisableSIMDArrayCompare);
comp->setOption(TR_DisableSIMDArrayTranslate);
comp->setOption(TR_DisableSIMDUTF16BEEncoder);
comp->setOption(TR_DisableSIMDUTF16LEEncoder);
comp->setOption(TR_DisableSIMDStringHashCode);
comp->setOption(TR_DisableVectorRegGRA);
}
Expand Down Expand Up @@ -1932,6 +1934,18 @@ OMR::Z::CodeGenerator::anyLitPoolSnippets()
return false;
}

bool
OMR::Z::CodeGenerator::getSupportsEncodeUtf16BigWithSurrogateTest()
{
if (self()->comp()->target().cpu.isAtLeast(OMR_PROCESSOR_S390_Z196))
{
return (!self()->comp()->getOption(TR_DisableUTF16BEEncoder) ||
(self()->getSupportsVectorRegisters() && !self()->comp()->getOption(TR_DisableSIMDUTF16BEEncoder)));
}

return false;
}

TR_S390ScratchRegisterManager*
OMR::Z::CodeGenerator::generateScratchRegisterManager(int32_t capacity)
{
Expand Down
2 changes: 2 additions & 0 deletions compiler/z/codegen/OMRCodeGenerator.hpp
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Expand Up @@ -264,6 +264,8 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
bool anyNonConstantSnippets();
bool anyLitPoolSnippets();

bool getSupportsEncodeUtf16BigWithSurrogateTest();

TR_S390ScratchRegisterManager* generateScratchRegisterManager(int32_t capacity = 8);

bool canTransformUnsafeCopyToArrayCopy();
Expand Down