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Merge pull request #3200 from hs-apotell/modarr
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Implement interface_array & module_array
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@alaindargelas
alaindargelas authored Sep 4, 2022
2 parents b26cd66 + 1cbfbf2 commit f79166f
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Showing 20 changed files with 1,751 additions and 568 deletions.
5 changes: 5 additions & 0 deletions include/Surelog/Design/ModuleDefinition.h
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Expand Up @@ -94,6 +94,10 @@ class ModuleDefinition : public DesignComponent, public ClockingBlockHolder {
attributes_ = data;
return true;
}
std::vector<UHDM::module_array*>* getModuleArrays() { return m_moduleArrays; }
void setModuleArrays(std::vector<UHDM::module_array*>* modules) {
m_moduleArrays = modules;
}

private:
const std::string m_name;
Expand All @@ -104,6 +108,7 @@ class ModuleDefinition : public DesignComponent, public ClockingBlockHolder {
UHDM::udp_defn* m_udpDefn;

UHDM::VectorOfattribute* attributes_ = nullptr;
std::vector<UHDM::module_array*>* m_moduleArrays = nullptr;
};

class ModuleDefinitionFactory {
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7 changes: 7 additions & 0 deletions include/Surelog/Design/ModuleInstance.h
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Expand Up @@ -50,10 +50,16 @@ class ModuleInstance : public ValuedComponentI {
std::string_view instName, std::string_view moduleName);
~ModuleInstance() override;

typedef std::map<UHDM::module_array*, std::vector<ModuleInstance*>>
ModuleArrayModuleInstancesMap;

void addSubInstance(ModuleInstance* subInstance);
std::vector<ModuleInstance*>& getAllSubInstances() {
return m_allSubInstances;
}
ModuleArrayModuleInstancesMap& getModuleArrayModuleInstancesMap() {
return m_moduleArrayModuleInstancesMap;
}
void setInstanceBinding(ModuleInstance* boundToInstance) {
m_boundInstance = boundToInstance;
}
Expand Down Expand Up @@ -122,6 +128,7 @@ class ModuleInstance : public ValuedComponentI {
ModuleInstance* m_boundInstance = nullptr;
bool m_elaborated = false;
std::set<std::string, StringViewCompare> m_overridenParams;
ModuleArrayModuleInstancesMap m_moduleArrayModuleInstancesMap;
};

class ModuleInstanceFactory {
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19 changes: 14 additions & 5 deletions include/Surelog/DesignCompile/CompileHelper.h
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Expand Up @@ -134,7 +134,8 @@ class CompileHelper final {

bool compileDataDeclaration(DesignComponent* component, const FileContent* fC,
NodeId id, bool interface,
CompileDesign* compileDesign, bool reduce, UHDM::VectorOfattribute* attributes);
CompileDesign* compileDesign, bool reduce,
UHDM::VectorOfattribute* attributes);

// ------------------------------------------------------------------------------------------
// UHDM modeling
Expand Down Expand Up @@ -189,11 +190,13 @@ class CompileHelper final {

bool compileTask(DesignComponent* component, const FileContent* fC,
NodeId nodeId, CompileDesign* compileDesign,
ValuedComponentI* instance, bool isMethod = false, bool reduce = false);
ValuedComponentI* instance, bool isMethod = false,
bool reduce = false);

bool compileFunction(DesignComponent* component, const FileContent* fC,
NodeId nodeId, CompileDesign* compileDesign,
ValuedComponentI* instance, bool isMethod = false, bool reduce = false);
ValuedComponentI* instance, bool isMethod = false,
bool reduce = false);

bool compileAssertionItem(DesignComponent* component, const FileContent* fC,
NodeId nodeId, CompileDesign* compileDesign);
Expand Down Expand Up @@ -224,7 +227,8 @@ class CompileHelper final {
const FileContent* fC, NodeId nodeId,
CompileDesign* compileDesign,
UHDM::any* pstmt = nullptr,
ValuedComponentI* instance = nullptr, bool reduce = false);
ValuedComponentI* instance = nullptr,
bool reduce = false);

UHDM::any* compileVariable(DesignComponent* component, const FileContent* fC,
NodeId nodeId, CompileDesign* compileDesign,
Expand Down Expand Up @@ -426,6 +430,10 @@ class CompileHelper final {
void compileLetDeclaration(DesignComponent* component, const FileContent* fC,
NodeId nodeId, CompileDesign* compileDesign);

void compileInstantiation(ModuleDefinition* mod, const FileContent* fC,
CompileDesign* compileDesign, NodeId id,
ValuedComponentI* instance);

/** Variable is either a bit select or a range */
bool isSelected(const FileContent* fC, NodeId id);

Expand Down Expand Up @@ -545,8 +553,9 @@ class CompileHelper final {
ValuedComponentI* instance);

std::string decompileHelper(const UHDM::any* sel);

void setUnElabMode(bool on) { m_unElabMode = on; }

private:
CompileHelper(const CompileHelper&) = delete;

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69 changes: 69 additions & 0 deletions src/DesignCompile/CompileHelper.cpp
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Expand Up @@ -42,6 +42,7 @@
#include <Surelog/ErrorReporting/Error.h>
#include <Surelog/ErrorReporting/ErrorContainer.h>
#include <Surelog/ErrorReporting/Location.h>
#include <Surelog/Library/Library.h>
#include <Surelog/Package/Package.h>
#include <Surelog/SourceCompile/Compiler.h>
#include <Surelog/SourceCompile/SymbolTable.h>
Expand Down Expand Up @@ -2256,6 +2257,74 @@ std::string CompileHelper::decompileHelper(const any* sel) {
return path_name;
}

void CompileHelper::compileInstantiation(ModuleDefinition* mod,
const FileContent* fC,
CompileDesign* compileDesign,
NodeId id,
ValuedComponentI* instance) {
UHDM::Serializer& s = compileDesign->getSerializer();
auto subModuleArray = mod->getModuleArrays();

NodeId moduleName = fC->sl_collect(id, VObjectType::slStringConst);
std::string libName = fC->getLibrary()->getName();
std::string mname = fC->SymName(moduleName);
std::string modName = libName + "@" + mname;

Design* design = compileDesign->getCompiler()->getDesign();
DesignComponent* def = design->getComponentDefinition(modName);
if (def == nullptr) return;

NodeId typespecId = fC->Child(id);
NodeId hierInstId = fC->sl_collect(id, slHierarchical_instance);
while (hierInstId) {
NodeId instId = fC->sl_collect(hierInstId, slName_of_instance);
NodeId identifierId;
std::string instName;
if (instId) {
identifierId = fC->Child(instId);
instName = fC->SymName(identifierId);
}

NodeId unpackedDimId = fC->Sibling(identifierId);
if (unpackedDimId) {
int unpackedSize = 0;
if (std::vector<UHDM::range*>* unpackedDimensions =
compileRanges(mod, fC, unpackedDimId, compileDesign, nullptr,
instance, false, unpackedSize, false)) {
UHDM::module_array* mod_array = s.MakeModule_array();
mod_array->Ranges(unpackedDimensions);
mod_array->VpiName(instName);
mod_array->VpiFullName(modName);
fC->populateCoreMembers(identifierId, identifierId, mod_array);

module_typespec* tps = s.MakeModule_typespec();
tps->VpiName(fC->SymName(typespecId));
fC->populateCoreMembers(typespecId, typespecId, tps);
mod_array->Elem_typespec(tps);

if (subModuleArray == nullptr) {
subModuleArray = s.MakeModule_arrayVec();
mod->setModuleArrays(subModuleArray);
}

subModuleArray->push_back(mod_array);
}
}
// } else {
// // Simple instance
// UHDM::module* m = s.MakeModule();
// m->VpiName(instName);
// m->VpiDefName(modName);
// m->VpiDefLineNo(fC->Line(mod->getNodeIds()[0]));
// m->VpiDefFile(fC->getSymbolTable()->getSymbol(
// fC->GetDefinitionFile(mod->getNodeIds()[0])));
// fC->populateCoreMembers(identifierId, identifierId, m);
// m->Instance(m);

hierInstId = fC->Sibling(hierInstId);
}
}

bool CompileHelper::compileInitialBlock(DesignComponent* component,
const FileContent* fC,
NodeId initial_construct,
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9 changes: 8 additions & 1 deletion src/DesignCompile/CompileModule.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -768,7 +768,6 @@ bool CompileModule::collectModuleObjects_(CollectType collectType) {
case VObjectType::slN_output_gate_instance:
case VObjectType::slUdp_instance:
case VObjectType::slUdp_instantiation:
case VObjectType::slModule_instantiation:
case VObjectType::slInterface_instantiation:
case VObjectType::slGate_instantiation:
case VObjectType::slConditional_generate_construct:
Expand All @@ -783,6 +782,14 @@ bool CompileModule::collectModuleObjects_(CollectType collectType) {
m_module->addObject(type, fnid);
break;
}
case VObjectType::slModule_instantiation: {
if (collectType != CollectType::OTHER) break;
m_helper.compileInstantiation(m_module, fC, m_compileDesign, id,
m_instance);
FileCNodeId fnid(fC, id);
m_module->addObject(type, fnid);
break;
}
case VObjectType::slInitial_construct:
if (collectType != CollectType::OTHER) break;
m_helper.compileInitialBlock(m_module, fC, id, m_compileDesign);
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52 changes: 36 additions & 16 deletions src/DesignCompile/DesignElaboration.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -46,17 +46,8 @@

// UHDM
#include <uhdm/ElaboratorListener.h>
#include <uhdm/RTTI.h>
#include <uhdm/bit_typespec.h>
#include <uhdm/clone_tree.h>
#include <uhdm/constant.h>
#include <uhdm/expr.h>
#include <uhdm/instance.h>
#include <uhdm/operation.h>
#include <uhdm/parameter.h>
#include <uhdm/ref_obj.h>
#include <uhdm/string_typespec.h>
#include <uhdm/typespec.h>
#include <uhdm/uhdm.h>

#include <fstream>
#include <queue>
Expand Down Expand Up @@ -1442,10 +1433,6 @@ void DesignElaboration::elaborateInstance_(
paramOverride = tmpId;
}

std::vector<int> from;
std::vector<int> to;
std::vector<int> index;

VObjectTypeUnorderedSet insttypes = {
VObjectType::slHierarchical_instance,
VObjectType::slN_input_gate_instance,
Expand Down Expand Up @@ -1526,10 +1513,13 @@ void DesignElaboration::elaborateInstance_(
}

NodeId unpackedDimId;

if (identifierId) unpackedDimId = fC->Sibling(identifierId);

if (unpackedDimId) {
std::vector<int> from;
std::vector<int> to;
std::vector<int> index;

// Vector instances
while (unpackedDimId) {
if (fC->Type(unpackedDimId) == slUnpacked_dimension) {
Expand Down Expand Up @@ -1563,9 +1553,39 @@ void DesignElaboration::elaborateInstance_(
}
unpackedDimId = fC->Sibling(unpackedDimId);
}

std::vector<ModuleInstance*> localSubInstances;
recurseInstanceLoop_(from, to, index, 0, def, fC, subInstanceId,
paramOverride, factory, parent, subConfig,
instName, modName, allSubInstances);
instName, modName, localSubInstances);
allSubInstances.insert(allSubInstances.end(),
localSubInstances.begin(),
localSubInstances.end());

// Create module array
if (type == VObjectType::slModule_instantiation) {
int unpackedSize = 0;
unpackedDimId = fC->Sibling(identifierId);
if (std::vector<UHDM::range*>* unpackedDimensions =
m_helper.compileRanges(def, fC, unpackedDimId,
m_compileDesign, nullptr, parent,
false, unpackedSize, false)) {
UHDM::Serializer& s = m_compileDesign->getSerializer();
UHDM::module_array* mod_array = s.MakeModule_array();
mod_array->Ranges(unpackedDimensions);
mod_array->VpiName(instName);
mod_array->VpiFullName(modName);
fC->populateCoreMembers(identifierId, identifierId, mod_array);

UHDM::module_typespec* tps = s.MakeModule_typespec();
NodeId typespecId = fC->Child(subInstanceId);
tps->VpiName(fC->SymName(typespecId));
fC->populateCoreMembers(typespecId, typespecId, tps);
mod_array->Elem_typespec(tps);
parent->getModuleArrayModuleInstancesMap().emplace(
mod_array, localSubInstances);
}
}
} else {
// Simple instance
if (reuseInstance) {
Expand Down
2 changes: 2 additions & 0 deletions src/DesignCompile/NetlistElaboration.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2020,6 +2020,8 @@ bool NetlistElaboration::elab_ports_nets_(
array_int->Ranges(unpackedDimensions);
array_int->VpiName(signame);
array_int->VpiSize(unpackedSize);
fC->populateCoreMembers(sig->getNodeId(), sig->getNodeId(),
array_int);

auto array = netlist->interface_arrays();
if (array == nullptr) {
Expand Down
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