pluto: Enable phaser integration #1184
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acostina
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Oct 2, 2023
projects/pluto/system_constr.xdc
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| # Pin | Package Pin | GPIO | ||
| # -----|-------------|--------- | ||
| # L10P | K13 | PL_GPIO0 | ||
| # L12N | M12 | PL_GPIO1 | ||
| # L24N | R10 | PL_GPIO2 | ||
| # L7N | N14 | PL_GPIO3 | ||
| # L9N | M14 | PL_GPIO4 |
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Can you add a couple of additional columns explaining typical connections for the GPIOs in the default Pluto firmware and when used with the CN0566
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Updated as requested.
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Created a dedicated Pluto testbench here: https://github.com/analogdevicesinc/testbenches/tree/pluto_phaser_master |
acostina
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Oct 6, 2023
This commit adds support for ADALM-PHASER, allowing the user to choose between the default PlutoSDR mode and Phaser mode through a software controlled GPIO pin: phaser_enable. The Generic TDD Engine was integrated to output a logic signal on the L10P pin, which connects to the input of the ADF4159, when receiving an external synchronization signal on the L12N pin from the Raspberry Pi. Two additional TDD channels are used to synchronize the TX/RX DMA transfer start: - TDD CH1 is connected to the RX DMA, triggering the synchronization flag; - TDD CH2 is connected to the TX unpacker's reset, backpressuring the TX DMA until deasserted. Signed-off-by: Ionut Podgoreanu <[email protected]>
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acostina
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PR Description
This commit adds support for ADALM-PHASER, allowing the user to choose between the default PlutoSDR mode and Phaser mode through a software controlled GPIO pin: phaser_enable.
The Generic TDD Engine was integrated to output a logic signal on the L10P pin, which connects to the input of the ADF4159, when receiving an external synchronization signal on the L12N pin from the Raspberry Pi. Two additional TDD channels are used to synchronize the TX/RX DMA transfer start.
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