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@lplana lplana released this 27 Mar 16:10
· 99 commits to master since this release
v0.0.1
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Learn about vigilant mode.

Initial spif release that supports SpiNNaker peripheral input.

spifrequires an update to the SpiNNaker SpiNN-5 board FPGA firmware. The attached bitfiles are for SpiNN-5 FPGA0, as this is the only FPGA that handles peripheral I/O.

  • Bitfile spin5_spif_front_1-1-0_280122_id0.bit is intended for use on standalone SpiNN-5 boards. Connect a spif board to the bottom front SATA connector.

  • Bitfile spin5_spif_back_1-1-0_280122_id0.bit is intended for use on multiboard SpiNNaker systems. Connect a spif board to the middle back SATA connector.

The bitfiles were generated using Xilinx ISE version '14.7'.

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