MIPS Instruction Set

MIPS instructions are grouped by their semantics on this page.

If you want to get a list of instructions sorted by their opcodes, please check our C++ code file

If you want to see instructions in alphabet order, you may want to use MIPS IV reference and MIPS32 reference

Table of Contents

• Instruction format
• ALU
  • Add/subtract
  • Multiplication/division
  • Shifts
  • Multiplication/division
  • Comparisons
  • Logical operations
• Control Flow
  • Conditional branches
  • Likely conditional branches
  • Unconditional jumps
  • Indirect jumps
  • Conditional moves
• Memory
  • Loads
  • Stores
  • Atomics
  • Prefetch
  • Memory Order
• Operating system
  • Coprocessor 0
  • Special instructions
  • Conditional traps

Instruction format

MIPS is a RISC processor, so every instruction has the same length — 32 bits (4 bytes). These bits have different meanings according to their displacement. They can be combined in following groups:

Name	Size in bits	Symbol	Used for
Opcode	6	E	Specification of instruction
Register specifications	5	s,t,d	see below
Register-immediate	5	R	Second part of opcode for RI and CP instructions
Shamt	5	S	Constant value for shifts
Immediate constant value	16	C	Immediate value for arithmetic and logical (AL) operations
Address	26	A	Address for jumps and procedure calls
Funct	6	f	Second part of opcode for instructions

Note: Even 26-bit field is called Address, it is never used for loads and stores!

Additionally, in tables below we may specify values explicitly:

• 0|1 — plain bit values
• - — ignored values

Register specificators

Register specificators are addresses of registers. They provide numbers of registers have source data and where machine should write result of instruction. MIPS supports instructions with up to 3 registers. They are named:

• s-register (source)
• t-register (target)
• d-register (destination)

Note: s- and t- registers do not correspond to s0-s7 and t0-t7 registers described on MIPS Registers page. Here it is just notation

Additionally, MIPS RF contains a pair of special registers, HI and LO which are used to accumulate results of multiplication and division operations. In some cases they are concatenated to 2x size register notated as [HI, LO].

Address of register consists of 5 bits, so there can be 32 usable logical registers on one core.

Types of format

MIPS supports 5 main types of instruction format: R, I, RI, J, and SPECIAL2

Type	Regs #	Immediate	Instruction bits	Used for
R	3	5 bits	000000ss sssttttt dddddSSS SSffffff	AL and shift operations on registers
RI	1	16 bits	000001ss sssRRRRR CCCCCCCC CCCCCCCC	Branches
I	2	16 bits	EEEEEEss sssttttt CCCCCCCC CCCCCCCC	AL operations with immediate values, load/stores, branches
J	0	26 bits	EEEEEEAA AAAAAAAA AAAAAAAA AAAAAAAA	Unconditional branches, procedure calls
COP0	2	5 bits	010000RR RRRttttt dddddAAA AAAAAAAA	Interaction with coprocessor 0
Special2	3	5 bits	011100ss sssttttt dddddSSS SSffffff	MIPS32 extenstions
Special3	3	5 bits	011111ss sssttttt dddddSSS SSffffff	MIPS32 secret instructions

---

Reference sheet

Opcode

left\right digit	000	001	010	011	100	101	110	111
000	R	RI	j	jal	beq	bne	blez	bgtz
001	addi	addiu	slti	sltiu	andi	ori	xori	lui
010	COP0	COP1	COP2	COP1X	beql	bnel	blezl	bgtzl
011	daddi	daddiu	ldl	ldr	SPECIAL2	jalx		SPECIAL3
100	lb	lh	lwl	lw	lbu	lhu	lwr	lwu
101	sb	sh	swl	sw	sdl	sdr	swr	cache
110	ll	lwc1	lwc2	pref	lld	ldc1	ldc2	ld
111	sc	swc1	swc2		scd	sdc1	sdc2	sd

Functor R type

left\right digit	000	001	010	011	100	101	110	111
000	sll	movci	srl	sra	sllv		srlv	srav
001	jr	jalr	movz	movn	syscall	break		sync
010	mfhi	mthi	mflo	mfhi	dsllv		dsrlv	dsrav
011	mult	multu	div	divu	dmult	dmultu	ddiv	ddivu
100	add	addu	sub	subu	and	or	xor	nor
101			slt	sltu	dadd	daddu	dsub	dsubu
110	tge	tgeu	tlt	tltu	teq		tne
111	dsll		dslr	dsra	dsll32		dsrl32	dsra32

Functor RI type

left\right digit	000	001	010	011	100	101	110	111
00	bltz	bgez	bltzl	bgezl	sllv
01	tgei	jalr	tlti	tltiu	teqi		tnei
10	bltzal	bgezal	bltzall	bgezall	dsllv
11								synci

Functor COP0 type

left\right digit	000	001	010	011	100	101	110	111
00	mfc0				mtc0
01
10	eret
11

Special2

left\right digit	000	001	010	011	100	101	110	111
000	madd	maddu	mul		msub	msubu
001
010
011
100	clz	clo			dclz	dclo
101
110
111								sdbbp

---

ALU

Add/subtract

All R-type

Name	Syntax	C code	Funct	Full format
add	add $d, $s, $t	d = s + t	0x20	000000ss sssttttt ddddd--- --100000
add unsigned	addu $d, $s, $t	d = s + t	0x21	000000ss sssttttt ddddd--- --100001
substract	sub $d, $s, $t	d = s - t	0x22	000000ss sssttttt ddddd--- --100010
substract unsigned	subu $d, $s, $t	d = s - t	0x23	000000ss sssttttt ddddd--- --100011

All I-type

Name	Syntax	C code	Opcode	Full format
add immediate	addi $t, $s, C	t = s + C	0x8	001000ss sssttttt CCCCCCCC CCCCCCCC
add immediate unsigned	addiu $t, $s, C	t = s + C	0x9	001001ss sssttttt CCCCCCCC CCCCCCCC

Multiplication/division

All R-type

Name	Syntax	C code	Funct	Full format
multiply	mult $s, $t	[HI, LO] = s * t	0x18	000000ss sssttttt -------- --011000
multiply unsigned	multu $s, $t	[HI, LO] = s * t	0x19	000000ss sssttttt -------- --011001
divide	div $s, $t	LO = s / t; HI = s % t	0x1A	000000ss sssttttt -------- --011010
divide unsigned	divu $s, $t	LO = s / t; HI = s % t	0x1B	000000ss sssttttt -------- --011011
move from HI	mfhi $d	d = HI	0x10	000000-- -------- ddddd--- --010000
move to HI	mthi $s	HI = s	0x11	000000ss sss----- -------- --010001
move from LO	mflo $d	d = LO	0x12	000000-- -------- ddddd--- --010010
move to LO	mtlo $s	LO = s	0x13	000000ss sss----- -------- --010011

Special2 type (MIPS32)

Name	Syntax	C code	Funct	Full format
multiply and add	madd $s, $t	[HI, LO] += s * t	0x00	011100ss sssttttt -------- --000000
multiply and add unsigned	maddu $s, $t	[HI, LO] += s * t	0x01	011100ss sssttttt -------- --000000
multiply to low	mul $d, $s, $t	d = s * t	0x02	011100ss sssttttt ddddd--- --000010
multiply and sub	msub $s, $t	[HI, LO] -= s * t	0x04	011100ss sssttttt -------- --000100
multiply and sub unsigned	msubu $s, $t	[HI, LO] -= s * t	0x05	011100ss sssttttt -------- --000101

Shifts

All R-type

Name	Syntax	C code	Funct	Full format
shift left logical immediate	sll $d, $t, S	d = t << S	0x0	000000-- ---ttttt dddddSSS SS000000
shift right logical immediate	srl $d, $t, S	d = t >> S	0x2	000000-- ---ttttt dddddSSS SS000010
shift right arithmetic immediate	sra $d, $t, S	d = (int32)t >> S	0x3	000000-- ---ttttt dddddSSS SS000011
shift left logical	sllv $d, $t, $s	d = t << s	0x4	000000ss sssttttt ddddd--- --000100
shift right logical	srlv $d, $t, $s	d = t >> s	0x6	000000ss sssttttt ddddd--- --000110
shift right arithmetic	srav $d, $t, $s	d = (int32)t >> s	0x7	000000ss sssttttt ddddd--- --000111

Comparisons

All R-type

Name	Syntax	C code	Funct	Full format
set on less than	slt $d, $s, $t	d = (s < t)	0x2A	000000ss sssttttt ddddd--- --101010
set on less than unsigned	sltu $d, $s, $t	d = (s < t)	0x2B	000000ss sssttttt ddddd--- --101011

All I-type

Name	Syntax	C code	Opcode	Full format
set on less than immediate	slti $t, $s, C	t = (s < C)	0xA	001010ss sssttttt CCCCCCCC CCCCCCCC
set on less than immediate unsigned	sltiu $t, $s, C	t = (s < C)	0xB	001011ss sssttttt CCCCCCCC CCCCCCCC

Logical operations

All R-type

Name	Syntax	C code	Funct	Full format
and	and $d, $t, $s	d = s & t	0x24	000000ss sssttttt ddddd--- --100100
or	or $d, $t, $s	d = s l t	0x25	000000ss sssttttt ddddd--- --100101
xor	xor $d, $t, $s	d = s ^ t	0x26	000000ss sssttttt ddddd--- --100110
nor	nor $d, $t, $s	d = ~ (s l t)	0x27	000000ss sssttttt ddddd--- --100111

All I-type

Name	Syntax	C code	Opcode	Full format
and with immediate	andi $s, $t, C	t = s & C	0xC	001100ss sssttttt CCCCCCCC CCCCCCCC
or with immediate	ori $s, $t, C	t = s l C	0xD	001101ss sssttttt CCCCCCCC CCCCCCCC
xor with immediate	xori $s, $t, C	t = s ^ C	0xE	001110ss sssttttt CCCCCCCC CCCCCCCC
load upper immediate	lui $t, C	t = C << 16	0xF	001111-- ---ttttt CCCCCCCC CCCCCCCC

---

Control Flow

Conditional branches

All I-type

Name	Syntax	PC advance	Opcode	Full format
branch on equal	beq $s, $t, C	PC += 4; if (s == t) PC += (C << 2)	0x4	000100ss sssttttt CCCCCCCC CCCCCCCC
branch on not equal	bne $s, $t, C	PC += 4; if (s != t) PC += (C << 2)	0x5	000101ss sssttttt CCCCCCCC CCCCCCCC
branch less than or equal than zero	blez $s, C	PC += 4; if (s <= 0) PC += (C << 2)	0x6	000110ss sss----- CCCCCCCC CCCCCCCC
branch greater than zero	bgtz $s, C	PC += 4; if (s > 0) PC += (C << 2)	0x7	000111ss sss----- CCCCCCCC CCCCCCCC

All RI-type

Name	Syntax	PC advance	REGIMM	Full format
branch on less than zero	bltz $s, C	PC += 4; if (s < 0) PC += (C << 2);	0x0	000001ss sss00000 CCCCCCCC CCCCCCCC
branch on greater than or equal to zero	bgez $s, C	PC += 4; if (s >= 0) PC += (C << 2);	0x1	000001ss sss00001 CCCCCCCC CCCCCCCC
branch on less than zero and link	bltzal $s, C	PC += 4; if (s < 0) PC += (C << 2);	0x10	000001ss sss10000 CCCCCCCC CCCCCCCC
branch on greater than or equal to zero and link	bgezal $s, C	PC += 4; if (s >= 0) PC += (C << 2);	0x11	000001ss sss10001 CCCCCCCC CCCCCCCC

Likely conditional branches (MIPS II)

These branches may be assumed as taken by branch prediction unit

All I-type

Name	Syntax	PC advance	Opcode	Full format
branch on equal likely	beql $s, $t, C	PC += 4; if (s == t) PC += (C << 2)	0x14	010100ss sssttttt CCCCCCCC CCCCCCCC
branch on not equal likely	bnel $s, $t, C	PC += 4; if (s != t) PC += (C << 2)	0x15	010101ss sssttttt CCCCCCCC CCCCCCCC
branch less than or equal than zero likely	blezl $s, C	PC += 4; if (s <= 0) PC += (C << 2)	0x16	010110ss sss----- CCCCCCCC CCCCCCCC
branch greater than zero likely	bgtzl $s, C	PC += 4; if (s > 0) PC += (C << 2)	0x17	010111ss sss----- CCCCCCCC CCCCCCCC

All RI-type

Name	Syntax	PC advance	REGIMM	Full format
branch on less than zero likely	bltzl $s, C	PC += 4; if (s < 0) PC += (C << 2);	0x2	000001ss sss00010 CCCCCCCC CCCCCCCC
branch on greater than or equal to zero likely	bgezl $s, C	PC += 4; if (s >= 0) PC += (C << 2);	0x3	000001ss sss00011 CCCCCCCC CCCCCCCC
branch on less than zero and link likely	bltzall $s, C	PC += 4; if (s < 0) PC += (C << 2);	0x12	000001ss sss10010 CCCCCCCC CCCCCCCC
branch on greater than or equal to zero and link likely	bgezall $s, C	PC += 4; if (s >= 0) PC += (C << 2);	0x13	000001ss sss10011 CCCCCCCC CCCCCCCC

Unconditional jumps

All J-type

Name	Syntax	C code	PC advance	Opcode	Full format
jump	j A		PC = (PC & 0xf0000000) l (A << 2)	0x2	000010AA AAAAAAAA AAAAAAAA AAAAAAAA
jump and link	jal A	ra = PC + 4	PC = (PC & 0xf0000000) l (A << 2)	0x3	000011AA AAAAAAAA AAAAAAAA AAAAAAAA

Indirect jumps

All R-type

Name	Syntax	C code	PC advance	Funct	Full format
jump register	jr $s		PC = s	0x8	000000ss sss----- -------- --001000
jump register and link	jalr $s, $d	d = PC + 4	PC = s	0x9	000000ss sss----- ddddd--- --001001

Conditional moves (MIPS IV)

All R-type

Name	Syntax	C code	Funct	Full format
move if zero	movz $d, $s, $t	if (t == 0) d = s	0xA	000000ss sssttttt ddddd--- --001010
move if not zero	movn $d, $s, $t	if (t != 0) d = s	0xB	000000ss sssttttt ddddd--- --001011

---

Memory

All I-type unless noted otherwise

Loads

Name	Syntax	C code	Opcode	Full format
load byte	lb $t, C($s)	t = *(int8*)(s + C)	0x20	100000ss sssttttt CCCCCCCC CCCCCCCC
load half word	lh $t, C($s)	t = *(int16*)(s + C)	0x21	100001ss sssttttt CCCCCCCC CCCCCCCC
load word left	lwl $t, C($s)	—	0x22	100010ss sssttttt CCCCCCCC CCCCCCCC
load word	lw $t, C($s)	t = *(int32*)(s + C)	0x23	100011ss sssttttt CCCCCCCC CCCCCCCC
load byte unsigned	lbu $t, C($s)	t = *(uint8*)(s + C)	0x24	100100ss sssttttt CCCCCCCC CCCCCCCC
load half word unsigned	lhu $t, C($s)	t = *(uint16*)(s + C)	0x25	100101ss sssttttt CCCCCCCC CCCCCCCC
load word right	lwr $t, C($s)	—	0x26	100010ss sssttttt CCCCCCCC CCCCCCCC

Stores

Name	Syntax	C code	Opcode	Full format
store byte	sb $t, C($s)	*(uint8*)(s + C) = (t & 0xff)	0x28	101000ss sssttttt CCCCCCCC CCCCCCCC
store half	sh $t, C($s)	*(uint16*)(s + C) = (t & 0xffff)	0x29	101000ss sssttttt CCCCCCCC CCCCCCCC
store word left	swl $t, C($s)	—	0x2A	101010ss sssttttt CCCCCCCC CCCCCCCC
store word	sw $t, C($s)	*(uint32*)(s + C) = t	0x2B	101011ss sssttttt CCCCCCCC CCCCCCCC
store word right	swr $t, C($s)	—	0x2E	101110ss sssttttt CCCCCCCC CCCCCCCC

Atomics (MIPS II)

Name	Syntax	C code	Opcode	Full format
load linked word	ll $t, C($s)	—	0x30	110000ss sssttttt CCCCCCCC CCCCCCCC
store conditional	sc $t, C($s)	—	0x38	111000ss sssttttt CCCCCCCC CCCCCCCC

Prefetch (MIPS IV)

Name	Syntax	C code	Opcode	Full format
prefetch	pref H, C($s)	—	0x33	110011ss sssHHHHH CCCCCCCC CCCCCCCC

Memory Order (MIPS II)

R-type

Name	Syntax	C code	Funct	Full format
syncronization barrier	sync	—	0xF	000000-- -------- -----000 00001111

---

Operating system

Coprocessor 0

All COP0-type

Name	Syntax	C code	Functor	Full format
move to CP0	mtc0 rt, rd	CP0[rd] = rt	0x00	01000000 000ttttt ddddd--- --------
move from CP0	mfc0 rt, rd	rd = CP0[rt]	0x04	01000000 100ttttt ddddd--- --------
exception return	eret	PC = CP0[EPC]; EXL = 0	0x10	01000010 0000000 00000000 00011000

Special instructions

Name	Syntax	PC advance	T	Opcode/Funct	Full format
system call	syscall	PC += 4	R	0xC	000000-- -------- -------- --001100
breakpoint	break	PC += 4	R	0xD	000000-- -------- -------- --001101

Conditional traps (MIPS II)

All R-type

Name	Syntax	C++ code	Funct	Full format
trap on greater or equal	tge $s, $t	if (s >= t) throw	0x30	000000ss sssttttt -------- --110000
trap on greater or equal unsigned	tgeu $s, $t	if (s >= t) throw	0x31	000000ss sssttttt -------- --110001
trap on less than	tlt $s, $t	if (s < t) throw	0x32	000000ss sssttttt -------- --110010
trap on less than unsigned	tltu $s, $t	if (s < t) throw	0x33	000000ss sssttttt -------- --110011
trap on equal	teq $s, $t	if (s == t) throw	0x34	000000ss sssttttt -------- --110100
trap on not equal	tne $s, $t	if (s != t) throw	0x36	000000ss sssttttt -------- --110110

All RI-type

Name	Syntax	C++ code	REGIMM	Full format
trap on greater than or equal immediate unsigned	tgei $s, C	if (s >= C) throw	0x8	000001ss sss01000 CCCCCCCC CCCCCCCC
trap on greater than or equal immediate unsigned	tgeiu $s, C	if (s >= C) throw	0x9	000001ss sss01001 CCCCCCCC CCCCCCCC
trap on less than immediate	tlti $s, C	if (s < C) throw	0xA	000001ss sss01010 CCCCCCCC CCCCCCCC
trap on less than immediate unsigned	tltiu $s, C	if (s < C) throw	0xB	000001ss sss01011 CCCCCCCC CCCCCCCC
trap on equal to immediate	teqi $s, C	if (s == C) throw	0xC	000001ss sss01100 CCCCCCCC CCCCCCCC
trap on not equal to immediate	tnei $s, C	if (s != C) throw	0xE	000001ss sss01110 CCCCCCCC CCCCCCCC