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First edition of combinational computer series. #641
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Great article! :)
submissions/Combinator Memory/ANT-combinator-computer-submission-draft.md
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5. Writing a Custom Compiler | ||
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**Please note that this series of posts assumes that the reader has at least a basic grasp on how the binary and hexadecimal number systems work. For more information on binary, [click here](https://byjus.com/maths/binary-number-system/).** |
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submissions/Combinator Memory/ANT-combinator-computer-submission-draft.md
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 To create a RAM block, one first needs to create a device that can continuously store a single value. In the computer science world, this is no easy task. However, the solution in Factorio is shockingly simple! Just feed the output of a combinator back into itself without modifying the signal. Like so: | ||
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{%include image.html src='https://i.imgur.com/e5nimlf.png' alt='"Who knew building a computer was this easy?"' caption='The simplest memory cell. Works by feeding the output directly back into the input.'%} |
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Might want to point out the green wire seen at the bottom of the arithmetic combinator. Or you can edit the picture so the green wire is highlighted. Idk how you'd highlight it nicely, but maybe by marking it with a very faint color or by having an arrow point to it. But I think just mentioning it in the caption is clear enough as well.
submissions/Combinator Memory/ANT-combinator-computer-submission-draft.md
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 In a nutshell, the interfacer creates what's called a "bitmask" (ex. `11110000`) that can be used to filter out the digits that the system cares about. This can be done by applying a "logical and" to both a number and the bitmask, which then only outputs the values that weren't masked. For instance, if the interfacer were to apply the mask of `11110000` to the value `10101010`, the resultant would be `10100000`; the last digits being cut off by the mask. The interfacer uses these masks to get rid of the bits that the processor want to override, then adds in the new, overriding bits. | ||
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 What's much more important to address is how it's used. The interfacer takes in the standard three signals '\[D\]ata', '\[W\]rite', and '\[A\]dress' with one additional signal: '\[S\]ize.' Size determines how much memory (in bytes) the processor want to allocate to the value being sent in. The address signal now points to the new "subaddresses," with an address of '0' accessing the first raw memory cell and an address of '4' accessing the second raw memory cell. When the size signal is set to greater than 1, the interfacer knows to access *more than one* of these subaddresses at a time. |
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Might want to remind the reader of why address 4 accessing the second raw memory cell makes sense (the reason being that 32 bits are being split into four groups of 8 bits). You can say that an address of '0' accesses the first memory cell's first byte, '1' its second byte, '2' its third, '3' its fourth, and '4' referring to the second memory cell's first byte.
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Co-authored-by: MyNameIsTrez <[email protected]>
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