Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

specify ISA #1

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion 1_blinky/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ $(error Toolchain not activated. Be sure to `source ../activate-toolchains.sh`)
endif

image: baremetal.s
riscv32-unknown-elf-gcc baremetal.s -ggdb -O0 -o image -ffreestanding -nostdlib
riscv32-unknown-elf-gcc baremetal.s -march=rv32imac -ggdb -O0 -o image -ffreestanding -nostdlib

launch: image
renode vexriscv.resc
Expand Down
1 change: 1 addition & 0 deletions 1_blinky/vexriscv.repl
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@ mem: Memory.MappedMemory @ sysbus 0x0
size: 0x00040000

cpu: CPU.VexRiscv @ sysbus
cpuType: "rv32imac"

gpio_out: GPIOPort.LiteX_GPIO @ sysbus 0x60000800
type: Type.Out
Expand Down