Skip to content
View vikramjain236's full-sized avatar

Block or report vikramjain236

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. KULeuven-MICAS/tinyvers KULeuven-MICAS/tinyvers Public

    TinyVers Heterogeneous SoC consists of a reconfigurable FlexML accelerator, a RISC-V processor, an eMRAM and a power management system.

    SystemVerilog 12 1

  2. ucb-ucie/uciedigital ucb-ucie/uciedigital Public

    Pure digital components of a UCIe controller

    Scala 48 5

  3. KULeuven-MICAS/zigzag KULeuven-MICAS/zigzag Public

    HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators

    C++ 115 43

  4. ucb-bar/chipyard ucb-bar/chipyard Public

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    Scala 1.7k 657

  5. ucb-bar/hammer ucb-bar/hammer Public

    Hammer: Highly Agile Masks Made Effortlessly from RTL

    Python 258 60