VPR error when trying to compile my design generated using PRGA

[polarbearsrock]

I am seeing the following error when trying to run VPR against my design (generated using PRGA) -

Building complex block graph took 0.02 seconds (max_rss 17.2 MiB, delta_rss +1.0 MiB)
Error 1:
Type: Blif file
File: syn.eblif
Line: 126
Message: Failed to find matching architecture model for '$SDFF_PP0'

Any idea on why I might be seeing this?

Expected Behaviour

The post implementation test bench should succeed as expected, but fails when VPR is upgraded to master and yosys is upgraded to main.

Current Behaviour

The test fails due to the above posted error.

Possible Solution

Steps to Reproduce

1. Follow the PRGA build \ quick example guide from here - https://prga.readthedocs.io/en/latest/quickstart.html
2. It will be great if we can get in touch here and debug this issue super quick - seems like a mismatch between a techmap and cell model for the module.

Context

I am trying to bring PRGA up to date with latest VTR and Yosys so we can work on adding new features.

Your Environment

• VTR revision used: latest from master
• Operating System and version: WSL (Ubuntu 22.04)
• Compiler version: cmake 3.22.1