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CI check for StarFive platform #108

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CI check for StarFive platform

mindachen1987 and others added 11 commits November 3, 2023 09:51
Remove DMA enable in CTRL register
Added DMA polling handling for RX/TX

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Co-authored-by: John Chew <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
Add PCD for little endian CPU. During RX, the endianess of data receive
via DMA will be swap.

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Cc: Li Yong <[email protected]>
Co-authored-by: mindachen1987 <[email protected]>
Signed-off-by: John Chew <[email protected]>
This driver do not have dependency on ArmLib. It will cause compilation
error when compile with risv architecture.

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Cc: Li Yong <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
Add base address PCD for eMMC and SDMMC
Add application command for SDMMC
Add PCD for Ultra High Speed (UHS) option

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Cc: Li Yong <[email protected]>
Co-authored-by: John Chew <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
The buffer address passed into the read/write block function sometimes
larger than 4GB. This driver only support 32-bit DMA addressing.
MMC timeout will occur if DMA buffer is allocated in 64-bit address.

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Cc: Li Yong <[email protected]>
Signed-off-by: John Chew <[email protected]>
Implement Pci Host Bridge and Pci Segment driver:
JH7110 SoC contains two PCI segment:

- PCI Segment 0 (USB):
    32-bit Memory: 0x3000_0000 ~ 0x3FFF_FFFF
    64-bit Memory: 0x9_0000_0000 ~0x9_4000_0000
- PCI Segment 1 (NVME):
    32-bit Memory: 0x3800_0000 ~ 0x37FF_FFFF
    64-bit Memory: 0x9_8000_0000 ~0x9_C000_0000

Non-prefetachable memory is not used in this configuration.

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Co-authored-by: John Chew <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
Acked-by: Sunil V L <[email protected]>
This patch include QSPI driver and Flash driver protocol.
QSPI driver:
	1. Used indirect read/write
	2. Master mode only
	3. Require to setup qspi driver after located protocol
	4. Require to free device if no longer needed
	5. Support command read/write & data read/write
Flash driver:
	1. Require QSPI protocol as prerequisite
	2. Support for flash read/write/update/erase
	3. Require to init flash driver after allocated protocol

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Signed-off-by: John Chew <[email protected]>
Acked-by: Sunil V L <[email protected]>
Support for efi variable to store in QSPI flash.
This driver is responsible to initialize both QSPI and Flash driver.

Firmware Volume(FV) Initialization:
	1. Copy flash content into allocated shadow buffer (RAM)
	2. Check FV header validity
	3. If not valid, erase flash based on the region defined in PCDs
           , else skip
	4. If erased, write flash with new FV header, else skip
EFI Variable read:
	1. Read anbd return the content from the shadow buffer (RAM)
EFI Variable write:
	1. Write the data into flash
	2. Update shadow buffer (RAM)

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Signed-off-by: John Chew <[email protected]>
Acked-by: Sunil V L <[email protected]>
- Add a new JH7110 silicon package.
- These files Contain platfrom specific Guids, PCDs and defines
  used for JH7110 SoC.

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Co-authored-by: John Chew <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
Acked-by: Sunil V L <[email protected]>
- Added new platform support for VisionFive2 SBC.
- Boot flow in VF2 using EDK2 as bootloader:
  BootROM -> U-Boot SPL -> OpenSBI -> EDK2 -> Linux -> OS

- Supported boot source for Linux from EDK2:
    - SD Card
    - eMMC
    - NVMe
    - USB

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Co-authored-by: John Chew <[email protected]>
Signed-off-by: mindachen1987 <[email protected]>
Acked-by: Sunil V L <[email protected]>
File:
      Platform/StarFive/
      Silicon/StarFive/
Maintainers:
      Sunil V L
      Minda Chen
      John Chew

Cc: Sunil V L <[email protected]>
Cc: Leif Lindholm <[email protected]>
Cc: Michael D Kinney <[email protected]>
Cc: Li Yong <[email protected]>
Signed-off-by: John Chew <[email protected]>
@davidlt
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davidlt commented Apr 25, 2024

I assume the name for this PR is wrong. This looks like StarFive JH7110 port. Is anyone looking at this?

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3 participants