C Structs for Register Bit Fields

[lorenzschmid]

This merge request extends the existing generated struct in C header files by adding additional structs for bit fields as well.

Generating C header files, adds constants for each registers (address, mask, preset, etc.) as well as a struct for the entire register map. Following an excerpt from a generated header file:

struct test_reg {
  uint32_t reg0;
  uint32_t reg1;
};

With the new CLI argument --gen-c-bit-struct, additional structs and union types for bit fields (that are part a register) are generated as well:

typedef struct {
  uint32_t field_a: 16;
  uint32_t : 7;
  uint32_t field_b: 1;
  uint32_t : 8;
} test_reg_reg0_s;

typedef union {
  uint32_t v;
  test_reg_reg0_s s;
} test_reg_reg0_u;

The union between the register value v and the bit fields of the struct s allow for an easy manipulation of bit fields in form of an object and without the use of constants or macros:

volatile struct unit_reg_file * reg_file;
test_reg_reg0_u reg;

reg.v = reg_file->reg.v;  // read entire register
reg.s.field_a = 123;      // modify field 'field_a' in register
reg_file->reg.v = reg.v;  // write modified register back

Furthermore, the union type replaces the type of the register in the register struct: In the following example, reg0 is of type test_reg_reg0_u instead of the previous type uint32_t. reg1 that contains no children remains of type uint32_t:

struct test_reg {
  test_reg_reg0_u reg0;
  uint32_t reg1;
};

Cheby Source for Example

memory-map:
  bus: apb-32
  name: test_reg
  x-c-header:
    prefix-struct: True
  description: 'Test register map'
  children:
    - reg:
        name: 'reg0'
        description: 'Register 0'
        access: rw
        width: 32
        children:
          - field:
              name: 'field_a'
              description: 'Field A'
              range: 15-0
              preset: 0
          - field:
              name: 'field_b'
              description: 'Field B'
              range: 23
              preset: 0
    - reg:
        name: 'reg1'
        description: 'Register 1'
        access: rw
        width: 32

[tgingold-cern]

As you documented, the layout of bit-field is indeed ABI dependents (mostly endianness).

Don't forget to add entries in README.md to document new features!

[lorenzschmid]

Don't forget to add entries in README.md to document new features!

Sorry, fixed in c5cedcb.

[tgingold-cern]

Ok, thanks!