Merge branch 'espressif:release/v5.2' into release/v5.2

components/bootloader_support/src/bootloader_random_esp32c6.c

@@ -53,7 +53,7 @@ void bootloader_random_enable(void)
 
     // create patterns and set them in pattern table
     uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation
-    uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
+    uint32_t pattern_two = (SAR2_CHANNEL << 2) | SAR1_ATTEN; // we want channel 9 with max attenuation
     uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
     REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);
 

components/bt/esp_ble_mesh/common/atomic.c

@@ -13,7 +13,7 @@
 /*
  * SPDX-FileCopyrightText: 2016 Intel Corporation
  * SPDX-FileCopyrightText: 2011-2014 Wind River Systems, Inc.
- * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -170,4 +170,18 @@ bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target)
     return ret;
 }
 
+bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val)
+{
+    bt_mesh_atomic_lock();
+
+    if (*target == excepted) {
+        *target = new_val;
+        bt_mesh_atomic_unlock();
+        return true;
+    }
+
+    bt_mesh_atomic_unlock();
+    return false;
+}
+
 #endif /* #ifndef CONFIG_ATOMIC_OPERATIONS_BUILTIN */

components/bt/esp_ble_mesh/common/include/mesh/atomic.h

@@ -147,6 +147,33 @@ static inline bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target,
 extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value);
 #endif
 
+/**
+ * @brief Atomic CAS operation.
+ *
+ * This compares the contents of @a *target
+ * with the contents of @a excepted. If equal,
+ * the operation is a read-modify-write operation
+ * that writes @a new_val into @a *target and return true.
+ * If they are not equal, the operation is a read
+ * and return false.
+ *
+ * @param target Address of atomic variable.
+ * @param excepted Value of excepted.
+ * @param new_val Write if target value is equal to expected one.
+ *
+ * @return
+ *         - true: Target value updated.
+ *         - false: Target value not updated.
+ */
+#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
+static inline bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val)
+{
+    return __atomic_compare_exchange_n(target, &excepted, &new_val, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
+}
+#else
+extern bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val);
+#endif
+
 /**
  * @cond INTERNAL_HIDDEN
  */

components/bt/esp_ble_mesh/core/adv.c

@@ -2,7 +2,7 @@
 
 /*
  * SPDX-FileCopyrightText: 2017 Intel Corporation
- * SPDX-FileContributor: 2018-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -335,8 +335,7 @@ static void adv_thread(void *p)
         }
 
         /* busy == 0 means this was canceled */
-        if (BLE_MESH_ADV(*buf)->busy) {
-            BLE_MESH_ADV(*buf)->busy = 0U;
+        if (bt_mesh_atomic_cas(&BLE_MESH_ADV_BUSY(*buf), 1, 0)) {
 #if !CONFIG_BLE_MESH_RELAY_ADV_BUF
             if (adv_send(*buf)) {
                 BT_WARN("Failed to send adv packet");
@@ -449,7 +448,7 @@ static void bt_mesh_unref_buf(bt_mesh_msg_t *msg)
 
     if (msg->arg) {
         buf = (struct net_buf *)msg->arg;
-        BLE_MESH_ADV(buf)->busy = 0U;
+        bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 0);
         if (buf->ref > 1U) {
             buf->ref = 1U;
         }
@@ -490,7 +489,7 @@ void bt_mesh_adv_send(struct net_buf *buf, uint8_t xmit,
 
     BLE_MESH_ADV(buf)->cb = cb;
     BLE_MESH_ADV(buf)->cb_data = cb_data;
-    BLE_MESH_ADV(buf)->busy = 1U;
+    bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1);
     BLE_MESH_ADV(buf)->xmit = xmit;
 
     bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL);
@@ -589,7 +588,7 @@ void bt_mesh_relay_adv_send(struct net_buf *buf, uint8_t xmit,
 
     BLE_MESH_ADV(buf)->cb = cb;
     BLE_MESH_ADV(buf)->cb_data = cb_data;
-    BLE_MESH_ADV(buf)->busy = 1U;
+    bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1);
     BLE_MESH_ADV(buf)->xmit = xmit;
 
     msg.arg = (void *)net_buf_ref(buf);
@@ -753,7 +752,7 @@ static void bt_mesh_ble_adv_send(struct net_buf *buf, const struct bt_mesh_send_
 
     BLE_MESH_ADV(buf)->cb = cb;
     BLE_MESH_ADV(buf)->cb_data = cb_data;
-    BLE_MESH_ADV(buf)->busy = 1U;
+    bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1);
 
     bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL);
 
@@ -772,7 +771,7 @@ static void ble_adv_tx_reset(struct ble_adv_tx *tx, bool unref)
     }
     bt_mesh_atomic_set(tx->flags, 0);
     memset(&tx->param, 0, sizeof(tx->param));
-    BLE_MESH_ADV(tx->buf)->busy = 0U;
+    bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(tx->buf), 0);
     if (unref) {
         net_buf_unref(tx->buf);
     }
@@ -961,7 +960,8 @@ int bt_mesh_stop_ble_advertising(uint8_t index)
     /* busy 1, ref 1; busy 1, ref 2;
      * busy 0, ref 0; busy 0, ref 1;
      */
-    if (BLE_MESH_ADV(tx->buf)->busy == 1U &&
+
+    if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(tx->buf)) &&
         tx->buf->ref == 1U) {
         unref = false;
     }

components/bt/esp_ble_mesh/core/adv.h

@@ -10,6 +10,7 @@
 #ifndef _ADV_H_
 #define _ADV_H_
 
+#include "mesh/atomic.h"
 #include "mesh/access.h"
 #include "mesh/adapter.h"
 
@@ -24,6 +25,7 @@ extern "C" {
 #define BLE_MESH_ADV_USER_DATA_SIZE     4
 
 #define BLE_MESH_ADV(buf)               (*(struct bt_mesh_adv **)net_buf_user_data(buf))
+#define BLE_MESH_ADV_BUSY(buf)          (BLE_MESH_ADV(buf)->busy)
 
 uint16_t bt_mesh_pdu_duration(uint8_t xmit);
 
@@ -48,8 +50,10 @@ struct bt_mesh_adv {
     const struct bt_mesh_send_cb *cb;
     void *cb_data;
 
-    uint8_t type:3,
-            busy:1;
+    uint8_t type:3;
+
+    bt_mesh_atomic_t busy;
+
     uint8_t xmit;
 };
 

components/bt/esp_ble_mesh/core/friend.c

@@ -183,7 +183,7 @@ static void friend_clear(struct bt_mesh_friend *frnd, uint8_t reason)
         /* Cancel the sending if necessary */
         if (frnd->pending_buf) {
             bt_mesh_adv_buf_ref_debug(__func__, frnd->last, 2U, BLE_MESH_BUF_REF_EQUAL);
-            BLE_MESH_ADV(frnd->last)->busy = 0U;
+            bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(frnd->last), 0);
         } else {
             bt_mesh_adv_buf_ref_debug(__func__, frnd->last, 1U, BLE_MESH_BUF_REF_EQUAL);
         }

components/bt/esp_ble_mesh/core/prov_common.c

@@ -359,7 +359,7 @@ static void free_segments(struct bt_mesh_prov_link *link)
         link->tx.buf[i] = NULL;
         bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL);
         /* Mark as canceled */
-        BLE_MESH_ADV(buf)->busy = 0U;
+        bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 0);
         net_buf_unref(buf);
     }
 }
@@ -474,7 +474,7 @@ static void prov_retransmit(struct k_work *work)
             break;
         }
 
-        if (BLE_MESH_ADV(buf)->busy) {
+        if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(buf))) {
             continue;
         }
 

components/bt/esp_ble_mesh/core/transport.c

@@ -2,7 +2,7 @@
 
 /*
  * SPDX-FileCopyrightText: 2017 Intel Corporation
- * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -310,7 +310,15 @@ static void seg_tx_done(struct seg_tx *tx, uint8_t seg_idx)
 {
     bt_mesh_adv_buf_ref_debug(__func__, tx->seg[seg_idx], 3U, BLE_MESH_BUF_REF_SMALL);
 
-    BLE_MESH_ADV(tx->seg[seg_idx])->busy = 0U;
+    /**
+     * When cancelling a segment that is still in the adv sending queue, `tx->seg_pending`
+     * must else be decremented by one. More detailed information
+     * can be found in BLEMESH24-26.
+     */
+    if (bt_mesh_atomic_cas(&BLE_MESH_ADV_BUSY(tx->seg[seg_idx]), 1, 0)) {
+        tx->seg_pending--;
+    }
+
     net_buf_unref(tx->seg[seg_idx]);
     tx->seg[seg_idx] = NULL;
     tx->nack_count--;
@@ -443,7 +451,7 @@ static void seg_tx_send_unacked(struct seg_tx *tx)
             continue;
         }
 
-        if (BLE_MESH_ADV(seg)->busy) {
+        if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) {
             BT_DBG("Skipping segment that's still advertising");
             continue;
         }

components/bt/esp_ble_mesh/core/transport.enh.c

@@ -350,7 +350,7 @@ static void seg_tx_done(struct seg_tx *tx, uint8_t seg_idx)
      */
     bt_mesh_adv_buf_ref_debug(__func__, tx->seg[seg_idx], 4U, BLE_MESH_BUF_REF_SMALL);
 
-    BLE_MESH_ADV(tx->seg[seg_idx])->busy = 0U;
+    bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(tx->seg[seg_idx]), 0);
     net_buf_unref(tx->seg[seg_idx]);
 
     tx->seg[seg_idx] = NULL;
@@ -498,7 +498,7 @@ static bool send_next_segment(struct seg_tx *tx, int *result)
     /* The segment may have already been transmitted, for example, the
      * Segment Retransmission timer is expired earlier.
      */
-    if (BLE_MESH_ADV(seg)->busy) {
+    if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) {
         return false;
     }
 
@@ -768,7 +768,7 @@ static bool resend_unacked_seg(struct seg_tx *tx, int *result)
      * A is still going to be retransmitted, but at this moment we could
      * find that the "busy" flag of Segment A is 1.
      */
-    if (BLE_MESH_ADV(seg)->busy) {
+    if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) {
         return false;
     }
 

components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c

@@ -217,7 +217,6 @@ static int host_rcv_pkt(uint8_t *data, uint16_t len)
             evbuf = ble_transport_alloc_evt(1);
             /* Skip advertising report if we're out of memory */
             if (!evbuf) {
-                ESP_LOGI(TAG, "Skipping advertising report due to low memory");
                 return 0;
             }
         } else {

components/driver/i2c/i2c.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -110,6 +110,18 @@ static const char *I2C_TAG = "i2c";
 #endif
 #define I2C_MEM_ALLOC_CAPS_DEFAULT      MALLOC_CAP_DEFAULT
 
+#if SOC_PERIPH_CLK_CTRL_SHARED
+#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_CLOCK_SRC_ATOMIC()
+#endif
+
+#if !SOC_RCC_IS_INDEPENDENT
+#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_RCC_ATOMIC()
+#endif
+
 /**
  * I2C bus are defined in the header files, let's check that the values are correct
  */
@@ -240,7 +252,9 @@ static void i2c_hw_disable(i2c_port_t i2c_num)
 {
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     if (i2c_context[i2c_num].hw_enabled != false) {
-        periph_module_disable(i2c_periph_signal[i2c_num].module);
+        I2C_RCC_ATOMIC() {
+            i2c_ll_enable_bus_clock(i2c_num, false);
+        }
         i2c_context[i2c_num].hw_enabled = false;
     }
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));
@@ -250,7 +264,10 @@ static void i2c_hw_enable(i2c_port_t i2c_num)
 {
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     if (i2c_context[i2c_num].hw_enabled != true) {
-        periph_module_enable(i2c_periph_signal[i2c_num].module);
+        I2C_RCC_ATOMIC() {
+            i2c_ll_enable_bus_clock(i2c_num, true);
+            i2c_ll_reset_register(i2c_num);
+        }
         i2c_context[i2c_num].hw_enabled = true;
     }
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));
@@ -375,7 +392,9 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
         return ESP_FAIL;
     }
     i2c_hw_enable(i2c_num);
-    i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    }
     //Disable I2C interrupt.
     i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
     i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
@@ -478,7 +497,9 @@ esp_err_t i2c_driver_delete(i2c_port_t i2c_num)
     }
 #endif
 
-    i2c_hal_deinit(&i2c_context[i2c_num].hal);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_deinit(&i2c_context[i2c_num].hal);
+    }
     free(p_i2c_obj[i2c_num]);
     p_i2c_obj[i2c_num] = NULL;
 
@@ -746,15 +767,19 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
         return ret;
     }
     i2c_hw_enable(i2c_num);
-    i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    }
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
     i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
 #if SOC_I2C_SUPPORT_SLAVE
     if (i2c_conf->mode == I2C_MODE_SLAVE) {  //slave mode
         i2c_hal_slave_init(&(i2c_context[i2c_num].hal));
         i2c_ll_slave_tx_auto_start_en(i2c_context[i2c_num].hal.dev, true);
-        i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk);
+        I2C_CLOCK_SRC_ATOMIC() {
+            i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk);
+        }
         i2c_ll_set_slave_addr(i2c_context[i2c_num].hal.dev, i2c_conf->slave.slave_addr, i2c_conf->slave.addr_10bit_en);
         i2c_ll_set_rxfifo_full_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_FULL_THRESH_VAL);
         i2c_ll_set_txfifo_empty_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_EMPTY_THRESH_VAL);
@@ -768,7 +793,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
         i2c_hal_master_init(&(i2c_context[i2c_num].hal));
         //Default, we enable hardware filter
         i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, I2C_FILTER_CYC_NUM_DEF);
-        i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk));
+        I2C_CLOCK_SRC_ATOMIC() {
+            i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk));
+        }
     }
     i2c_ll_update(i2c_context[i2c_num].hal.dev);
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));