Merge branch 'espressif:master' into master

tasmota · Mar 9, 2024 · 562840c · 562840c
2 parents 0e9a38a + c460e1c
commit 562840c
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Showing 130 changed files with 5,677 additions and 1,064 deletions.
diff --git a/components/bt/host/bluedroid/bta/dm/bta_dm_act.c b/components/bt/host/bluedroid/bta/dm/bta_dm_act.c
@@ -615,6 +615,11 @@ void bta_dm_disable (tBTA_DM_MSG *p_data)
     btm_ble_resolving_list_cleanup ();  //by TH, because cmn_ble_vsc_cb.max_filter has something mistake as btm_ble_adv_filter_cleanup
 #endif
 
+#if BLE_INCLUDED == TRUE
+    // btm_ble_multi_adv_init is called when the host is enabled, so btm_ble_multi_adv_cleanup is called when the host is disabled.
+    btm_ble_multi_adv_cleanup();
+#endif
+
 }
 
 /*******************************************************************************

diff --git a/components/bt/host/bluedroid/bta/dm/bta_dm_api.c b/components/bt/host/bluedroid/bta/dm/bta_dm_api.c
@@ -2921,7 +2921,6 @@ void BTA_VendorCleanup (void)
     }
 #endif
 
-    btm_ble_multi_adv_cleanup();
 }
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 void BTA_DmBleGapReadPHY(BD_ADDR addr)

diff --git a/components/bt/host/bluedroid/stack/btm/btm_ble_5_gap.c b/components/bt/host/bluedroid/stack/btm/btm_ble_5_gap.c
@@ -798,8 +798,13 @@ tBTM_STATUS BTM_BlePeriodicAdvCreateSync(tBTM_BLE_Periodic_Sync_Params *params)
         || (params->reports_disabled > 0x01)
         || (params->filter_duplicates > 0x01)
         #endif
-        || (params->addr_type > 0x01) ||
-        (params->sid > 0xf) || (params->skip > 0x01F3)) {
+        /*If the Periodic Advertiser List is not used,
+        the Advertising_SID, Advertiser Address_Type, and Advertiser Address
+        parameters specify the periodic advertising device to listen to; otherwise they
+        shall be ignored.*/
+        || (params->filter_policy == 0 && params->addr_type > 0x01)
+        || (params->filter_policy == 0 && params->sid > 0xf)
+        || (params->skip > 0x01F3)) {
             status = BTM_ILLEGAL_VALUE;
             BTM_TRACE_ERROR("%s, The sync parameters is invalid.", __func__);
             goto end;

diff --git a/components/bt/host/bluedroid/stack/btm/btm_ble_multi_adv.c b/components/bt/host/bluedroid/stack/btm/btm_ble_multi_adv.c
@@ -824,6 +824,13 @@ void btm_ble_multi_adv_init(void)
 *******************************************************************************/
 void btm_ble_multi_adv_cleanup(void)
 {
+#if BTM_DYNAMIC_MEMORY == TRUE
+    if (btm_multi_adv_cb_ptr == NULL)
+    {
+        BTM_TRACE_WARNING("%s memory has been freed", __func__);
+        return;
+    }
+#endif
     if (btm_multi_adv_cb.p_adv_inst) {
         osi_free(btm_multi_adv_cb.p_adv_inst);
         btm_multi_adv_cb.p_adv_inst = NULL;

diff --git a/components/bt/host/nimble/Kconfig.in b/components/bt/host/nimble/Kconfig.in
@@ -388,8 +388,7 @@ config BT_NIMBLE_RPA_TIMEOUT
     depends on BT_NIMBLE_ENABLED
     default 900
     help
-        Time interval between RPA address change. This is applicable in case of
-        Host based RPA
+        Time interval between RPA address change.
 
 menuconfig BT_NIMBLE_MESH
     bool "Enable BLE mesh functionality"
@@ -942,9 +941,35 @@ menu "Host-controller Transport"
         help
             Uart port
 
+    choice BT_NIMBLE_HCI_USE_UART_BAUDRATE
+        prompt "Uart Hci Baud Rate"
+        default UART_BAUDRATE_921600
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
+        help
+            Uart Baud Rate
+
+        config UART_BAUDRATE_115200
+            bool "115200"
+        config UART_BAUDRATE_230400
+            bool "230400"
+        config UART_BAUDRATE_460800
+            bool "460800"
+        config UART_BAUDRATE_921600
+            bool "921600"
+    endchoice
+
+    config BT_NIMBLE_HCI_UART_BAUDRATE
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
+        int
+        default 115200 if  UART_BAUDRATE_115200
+        default 230400 if  UART_BAUDRATE_230400
+        default 460800 if  UART_BAUDRATE_460800
+        default 921600 if  UART_BAUDRATE_921600
+
     choice BT_NIMBLE_USE_HCI_UART_PARITY
         prompt "Uart PARITY"
         default UART_PARITY_NONE
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
         help
             Uart Parity
 
@@ -960,16 +985,19 @@ menu "Host-controller Transport"
         int
         default 0 if !UART_PARITY_NONE
         default 1 if UART_PARITY_NONE
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
 
     config BT_NIMBLE_TRANSPORT_UART_PARITY_ODD
         int
         default 0 if !UART_PARITY_ODD
         default 1 if UART_PARITY_ODD
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
 
     config BT_NIMBLE_TRANSPORT_UART_PARITY_EVEN
         int
         default 0 if !UART_PARITY_EVEN
         default 1 if UART_PARITY_EVEN
+        depends on BT_CONTROLLER_DISABLED && BT_NIMBLE_TRANSPORT_UART
 
     config BT_NIMBLE_UART_RX_PIN
         int "UART Rx pin"

diff --git a/components/bt/host/nimble/nimble b/components/bt/host/nimble/nimble
diff --git a/components/bt/host/nimble/port/include/esp_nimble_cfg.h b/components/bt/host/nimble/port/include/esp_nimble_cfg.h
@@ -610,6 +610,10 @@
 #define MYNEWT_VAL_BLE_GATT_READ_MULT (MYNEWT_VAL_BLE_ROLE_CENTRAL)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_GATT_READ_MULT_VAR
+#define MYNEWT_VAL_BLE_GATT_READ_MULT_VAR (MYNEWT_VAL_BLE_ROLE_CENTRAL)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_GATT_READ_UUID
 #define MYNEWT_VAL_BLE_GATT_READ_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL)
 #endif
@@ -1792,7 +1796,7 @@
 #endif
 #endif
 
-#if CONFIG_BT_CONTROLLER_DISABLED
+#if CONFIG_BT_CONTROLLER_DISABLED && CONFIG_BT_NIMBLE_TRANSPORT_UART
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_UART_PORT
 #define MYNEWT_VAL_BLE_TRANSPORT_UART_PORT CONFIG_BT_NIMBLE_TRANSPORT_UART_PORT
 #endif
@@ -1814,7 +1818,7 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_UART_BAUDRATE
-#define MYNEWT_VAL_BLE_TRANSPORT_UART_BAUDRATE (921600)
+#define MYNEWT_VAL_BLE_TRANSPORT_UART_BAUDRATE CONFIG_BT_NIMBLE_HCI_UART_BAUDRATE
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_UART_DATA_BITS

diff --git a/components/bt/porting/nimble/include/nimble/nimble_opt_auto.h b/components/bt/porting/nimble/include/nimble/nimble_opt_auto.h
@@ -84,6 +84,10 @@ extern "C" {
 #define NIMBLE_BLE_ATT_CLT_READ_MULT            \
     (MYNEWT_VAL(BLE_GATT_READ_MULT))
 
+#undef NIMBLE_BLE_ATT_CLT_READ_MULT_VAR
+#define NIMBLE_BLE_ATT_CLT_READ_MULT_VAR        \
+    (MYNEWT_VAL(BLE_GATT_READ_MULT_VAR))
+
 #undef NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE
 #define NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE      \
     (MYNEWT_VAL(BLE_GATT_DISC_ALL_SVCS))

diff --git a/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c b/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
@@ -7,6 +7,7 @@
 #include "driver/spi_slave.h"
 #include "esp_log.h"
 #include "driver/gpio.h"
+#include "esp_private/gpio.h"
 #include "hal/gpio_hal.h"
 #include "esp_rom_gpio.h"
 
@@ -220,13 +221,13 @@ void master_free_device_bus(spi_device_handle_t spi)
 
 void spitest_gpio_output_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
 {
-    gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], func);
+    gpio_func_sel(gpio_num, func);
     esp_rom_gpio_connect_out_signal(gpio_num, signal_idx, 0, 0);
 }
 
 void spitest_gpio_input_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
 {
-    gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], func);
+    gpio_func_sel(gpio_num, func);
     esp_rom_gpio_connect_in_signal(gpio_num, signal_idx, 0);
 }
 

diff --git a/components/esp_driver_spi/include/driver/spi_common.h b/components/esp_driver_spi/include/driver/spi_common.h
@@ -89,7 +89,8 @@ typedef spi_common_dma_t spi_dma_chan_t;
  *
  * You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the
  * GPIO matrix to route the signals. An exception is made when all signals either can be routed through
- * the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
+ * the IO_MUX or are -1. In that case, the IO_MUX is used. On ESP32, using GPIO matrix will bring about 25ns of input
+ * delay, which may cause incorrect read for >40MHz speeds.
  *
  * @note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t refering to these lines will be ignored and can thus safely be left uninitialized.
  */

diff --git a/components/esp_driver_spi/include/driver/spi_master.h b/components/esp_driver_spi/include/driver/spi_master.h
@@ -165,8 +165,13 @@ typedef struct spi_device_t *spi_device_handle_t;  ///< Handle for a device on a
  * peripheral and routes it to the indicated GPIO. All SPI master devices have three CS pins and can thus control
  * up to three devices.
  *
- * @note While in general, speeds up to 80MHz on the dedicated SPI pins and 40MHz on GPIO-matrix-routed pins are
- *       supported, full-duplex transfers routed over the GPIO matrix only support speeds up to 26MHz.
+ * @note On ESP32, due to the delay of GPIO matrix, the maximum frequency SPI Master can correctly samples the slave's
+ *       output is lower than the case using IOMUX. Typical maximum frequency communicating with an ideal slave
+ *       without data output delay: 80MHz (IOMUX pins) and 26MHz (GPIO matrix pins). With the help of extra dummy
+ *       cycles in half-duplex mode, the delay can be compensated by setting `input_delay_ns` in `dev_config` structure
+ *       correctly.
+ *
+ *       There's no notable delay on chips other than ESP32.
  *
  * @param host_id SPI peripheral to allocate device on
  * @param dev_config SPI interface protocol config for the device

diff --git a/components/esp_driver_spi/src/gpspi/spi_common.c b/components/esp_driver_spi/src/gpspi/spi_common.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -15,8 +15,9 @@
 #include "esp_heap_caps.h"
 #include "soc/spi_periph.h"
 #include "soc/ext_mem_defs.h"
-#include "driver/gpio.h"
 #include "driver/spi_master.h"
+#include "driver/gpio.h"
+#include "esp_private/gpio.h"
 #include "esp_private/periph_ctrl.h"
 #include "esp_private/spi_common_internal.h"
 #include "esp_private/spi_share_hw_ctrl.h"
@@ -645,7 +646,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
             PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->mosi_io_num]);
 #endif
-            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], FUNC_GPIO);
+            gpio_func_sel(bus_config->mosi_io_num, FUNC_GPIO);
         }
         if (bus_config->miso_io_num >= 0) {
             if (miso_need_output || (temp_flag & SPICOMMON_BUSFLAG_DUAL)) {
@@ -658,7 +659,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
             PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->miso_io_num]);
 #endif
-            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->miso_io_num], FUNC_GPIO);
+            gpio_func_sel(bus_config->miso_io_num, FUNC_GPIO);
         }
         if (bus_config->quadwp_io_num >= 0) {
             gpio_set_direction(bus_config->quadwp_io_num, GPIO_MODE_INPUT_OUTPUT);
@@ -667,7 +668,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
             PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num]);
 #endif
-            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], FUNC_GPIO);
+            gpio_func_sel(bus_config->quadwp_io_num, FUNC_GPIO);
         }
         if (bus_config->quadhd_io_num >= 0) {
             gpio_set_direction(bus_config->quadhd_io_num, GPIO_MODE_INPUT_OUTPUT);
@@ -676,7 +677,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
             PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num]);
 #endif
-            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], FUNC_GPIO);
+            gpio_func_sel(bus_config->quadhd_io_num, FUNC_GPIO);
         }
         if (bus_config->sclk_io_num >= 0) {
             if (sclk_need_output) {
@@ -689,7 +690,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
             PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->sclk_io_num]);
 #endif
-            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], FUNC_GPIO);
+            gpio_func_sel(bus_config->sclk_io_num, FUNC_GPIO);
         }
 #if SOC_SPI_SUPPORT_OCT
         if ((flags & SPICOMMON_BUSFLAG_OCTAL) == SPICOMMON_BUSFLAG_OCTAL) {
@@ -707,7 +708,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #if CONFIG_IDF_TARGET_ESP32S2
                     PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[io_nums[i]]);
 #endif
-                    gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[io_nums[i]], FUNC_GPIO);
+                    gpio_func_sel(io_nums[i], FUNC_GPIO);
                 }
             }
         }
@@ -755,8 +756,10 @@ void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_num,
         if (cs_num == 0) {
             esp_rom_gpio_connect_in_signal(cs_io_num, spi_periph_signal[host].spics_in, false);
         }
+#if CONFIG_IDF_TARGET_ESP32S2
         PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[cs_io_num]);
-        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[cs_io_num], FUNC_GPIO);
+#endif
+        gpio_func_sel(cs_io_num, FUNC_GPIO);
     }
 }
 

diff --git a/components/esp_driver_spi/test_apps/.build-test-rules.yml b/components/esp_driver_spi/test_apps/.build-test-rules.yml
@@ -3,8 +3,10 @@
     - esp_mm  # for cache
     - esp_driver_spi
     - esp_driver_gpio
+  depends_filepatterns:
+    - components/driver/test_apps/components/test_driver_utils/**/*
 
-components/esp_driver_spi/test_apps/spi/master:
+components/esp_driver_spi/test_apps/master:
   disable:
     - if: SOC_GPSPI_SUPPORTED != 1
   disable_test:
@@ -13,7 +15,7 @@ components/esp_driver_spi/test_apps/spi/master:
       reason: not supported # TODO: IDF-8942
   <<: *spi_depends_default
 
-components/esp_driver_spi/test_apps/spi/param:
+components/esp_driver_spi/test_apps/param:
   disable:
     - if: SOC_GPSPI_SUPPORTED != 1
   disable_test:
@@ -22,7 +24,7 @@ components/esp_driver_spi/test_apps/spi/param:
       reason: not supported # TODO: IDF-8942
   <<: *spi_depends_default
 
-components/esp_driver_spi/test_apps/spi/slave:
+components/esp_driver_spi/test_apps/slave:
   disable:
     - if: SOC_GPSPI_SUPPORTED != 1
   disable_test:
@@ -31,7 +33,7 @@ components/esp_driver_spi/test_apps/spi/slave:
       reason: not supported # TODO: IDF-8942
   <<: *spi_depends_default
 
-components/esp_driver_spi/test_apps/spi/slave_hd:
+components/esp_driver_spi/test_apps/slave_hd:
   disable:
     - if: SOC_GPSPI_SUPPORTED != 1
     - if: SOC_SPI_SUPPORT_SLAVE_HD_VER2 != 1

diff --git a/components/esp_driver_spi/test_apps/components/spi_bench_mark/CMakeLists.txt b/components/esp_driver_spi/test_apps/components/spi_bench_mark/CMakeLists.txt
@@ -0,0 +1,4 @@
+
+idf_component_register(
+    INCLUDE_DIRS "include"
+)
-Original file line number
+Diff line change
@@ Expand Up / @@ -2921,7 +2921,6 @@ void BTA_VendorCleanup (void) @@
         }
     #endif
-        btm_ble_multi_adv_cleanup();
     }
     #if (BLE_50_FEATURE_SUPPORT == TRUE)
     void BTA_DmBleGapReadPHY(BD_ADDR addr)
@@ Expand Down @@
+15 −0		nimble/host/include/host/ble_gatt.h
+1 −0		nimble/host/src/ble_att.c
+18 −3		nimble/host/src/ble_att_clt.c
+2 −1		nimble/host/src/ble_att_priv.h
+1 −1		nimble/host/src/ble_att_svr.c
+1 −1		nimble/host/src/ble_gatt_priv.h
+121 −16		nimble/host/src/ble_gattc.c
+5 −0		nimble/host/syscfg.yml
+2 −2		nimble/host/test/src/ble_att_clt_test.c
+4 −0		nimble/include/nimble/nimble_opt_auto.h
+4 −0		porting/examples/linux/include/syscfg/syscfg.h
+4 −0		porting/examples/linux_blemesh/include/syscfg/syscfg.h
+4 −0		porting/examples/nuttx/include/syscfg/syscfg.h
+4 −0		porting/nimble/include/syscfg/syscfg.h
+4 −0		porting/npl/riot/include/syscfg/syscfg.h