PIC18F25K50

README.txt

@@ -112,11 +112,12 @@ The following MCU's and configurations have been tested:
  * PIC24FJ64GB002
  * PIC24FJ256DA206
  * PIC18F46J50 - PIC18F Starter Kit
+ * PIC18F25K50
  * PIC16F1459
  * PIC16F1454 - similar to PIC16F1459
 
 If your hardware is not supported, and it's in the PIC16F/18F/24F/32MX
-family, I can probably easily make you a port without very much trouble. 
+family, I can probably easily make you a port without very much trouble.
 The easiest way is for you to send me a development board.  If your hardware
 is in another MCU family which is not currently supported, I can also make
 you a port, but it will be more effort.  In either case, I'd be happy to

apps/cdc_acm/MPLAB.X/nbproject/project.xml

@@ -1,4 +1,5 @@
-<?xml version="1.0" encoding="UTF-8"?><project xmlns="http://www.netbeans.org/ns/project/1">
+<?xml version="1.0" encoding="UTF-8"?>
+<project xmlns="http://www.netbeans.org/ns/project/1">
     <type>com.microchip.mplab.nbide.embedded.makeproject</type>
     <configuration>
         <data xmlns="http://www.netbeans.org/ns/make-project/1">

apps/cdc_acm/main.c

@@ -12,7 +12,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE.  For details, see sections 7, 8, and 9
  * of the Apache License, version 2.0 which apply to this file.  If you have
  * purchased a commercial license for this software from Signal 11 Software,
- * your commerical license superceeds the information in this header.
+ * your commercial license supersedes the information in this header.
  *
  * Alan Ott
  * Signal 11 Software

apps/common/hardware.c

@@ -49,6 +49,14 @@ _CONFIG3(WPFP_WPFP255 & SOSCSEL_SOSC & WUTSEL_LEG & ALTPMP_ALPMPDIS & WPDIS_WPDI
 #pragma config IOL1WAY = OFF
 #pragma config WPDIS = OFF /* This pragma seems backwards */
 
+#elif defined(_18F25K50) || defined(_18F45K50)
+#pragma config PLLSEL = PLL3X    //PLL = 3x 16MHz = 48Mhz
+#pragma config CFGPLLEN = ON    //PLL Enabled
+#pragma config CPUDIV = NOCLKDIV    //No CPU Clock Divider
+#pragma config LS48MHZ = SYS48X8    //USB LS needs 6MHz, 48MHz/8=6MHz
+#pragma config FOSC = INTOSCIO    //Internal oscillator with IO on OSC pins
+#pragma config WDTEN = OFF    //WDT disabled in hardware (SWDTEN ignored)
+
 #elif _16F1459 || _16F1454
 #pragma config FOSC = INTOSC
 #pragma config WDTE = OFF
@@ -216,6 +224,17 @@ void hardware_init(void)
 	/* Enable Active clock-tuning from the USB */
 	ACTCONbits.ACTSRC = 1; /* 1=USB */
 	ACTCONbits.ACTEN = 1;
+#elif defined(_18F25K50) || defined(_18F45K50)
+	// SCS FOSC; IDLEN disabled; IRCF 16MHz;
+	OSCCON = 0x70;
+	// INTSRC INTRC_31_25KHz; PLLEN disabled; PRISD disabled; SOSCGO disabled;
+	OSCCON2 = 0x00;
+	// SPLLMULT 4xPLL; TUN 0;
+	OSCTUNE = 0x00;
+	// ACTSRC Full speed USB events; ACTUD enabled; ACTEN enabled;
+	ACTCON = 0x90;
+	// Wait for PLL to stabilize
+	while(PLLRDY == 0){}
 #elif __32MX460F512L__
 	system_config_performance(80000000);
 #elif __32MX795F512L__