Added support for Ariane (CVA6) on Digilent Genesys 2 [riscv] #246
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Signed-off-by: Matt Rossouw <[email protected]>
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Ivan-Velickovic
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Nov 1, 2024
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Cool, will wait for seL4/seL4#1341 to go through and then we can merge.
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This pull request adds initial support for the CVA6 (formerly Ariane, still known as Ariane in seL4) on the Digilent Genesys 2 FPGA board. It is an open-source RISC-V processor core implementing rv64i.
This change depends on an associated kernel change to re-enable the PLIC, currently in a PR here.