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Add on-chip voltage regulator (VREG) voltage setting function #757
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77d13b8
Add on-chip voltage regulator (VREG) voltage setting function
AkiyukiOkayasu 4255aa1
Merge remote-tracking branch 'origin' into vreg
AkiyukiOkayasu 4adab0d
Refactor set_voltage() and get_voltage()
AkiyukiOkayasu 2912d43
Add on-target-test for vreg voltage
AkiyukiOkayasu 6c5db05
Remove on-target-test for vreg voltage
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#![no_std] | ||
#![no_main] | ||
#![cfg(test)] | ||
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use defmt_rtt as _; // defmt transport | ||
use defmt_test as _; | ||
use panic_probe as _; // panic handler | ||
use rp2040_hal as hal; // memory layout | ||
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/// The linker will place this boot block at the start of our program image. We | ||
/// need this to help the ROM bootloader get our code up and running. | ||
/// Note: This boot block is not necessary when using a rp-hal based BSP | ||
/// as the BSPs already perform this step. | ||
#[link_section = ".boot2"] | ||
#[used] | ||
pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H; | ||
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/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust | ||
/// if your board has a different frequency | ||
const XTAL_FREQ_HZ: u32 = 12_000_000u32; | ||
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struct State { | ||
vreg: hal::pac::VREG_AND_CHIP_RESET, | ||
} | ||
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#[defmt_test::tests] | ||
mod tests { | ||
use crate::{State, XTAL_FREQ_HZ}; | ||
use defmt::assert; | ||
use defmt_rtt as _; | ||
use panic_probe as _; | ||
use rp2040_hal as hal; | ||
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use hal::pac::vreg_and_chip_reset::vreg::VSEL_A; | ||
use hal::vreg; | ||
use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog}; | ||
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#[init] | ||
fn setup() -> State { | ||
unsafe { | ||
hal::sio::spinlock_reset(); | ||
} | ||
let mut pac = pac::Peripherals::take().unwrap(); | ||
let _core = pac::CorePeripherals::take().unwrap(); | ||
let mut watchdog = Watchdog::new(pac.WATCHDOG); | ||
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let _clocks = init_clocks_and_plls( | ||
XTAL_FREQ_HZ, | ||
pac.XOSC, | ||
pac.CLOCKS, | ||
pac.PLL_SYS, | ||
pac.PLL_USB, | ||
&mut pac.RESETS, | ||
&mut watchdog, | ||
) | ||
.ok() | ||
.unwrap(); | ||
State { | ||
vreg: pac.VREG_AND_CHIP_RESET, | ||
} | ||
} | ||
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#[test] | ||
fn change_onchip_regulator_voltage(state: &mut State) { | ||
// Set the voltage to 1.05V | ||
let target_voltage = VSEL_A::VOLTAGE1_05; | ||
vreg::set_voltage(&mut state.vreg, target_voltage); | ||
let v = vreg::get_voltage(&mut state.vreg).unwrap(); | ||
assert!(v == target_voltage); | ||
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// Set the voltage to 1.10V | ||
let target_voltage = VSEL_A::VOLTAGE1_10; | ||
vreg::set_voltage(&mut state.vreg, target_voltage); | ||
let v = vreg::get_voltage(&mut state.vreg).unwrap(); | ||
assert!(v == target_voltage); | ||
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// Set the voltage to 1.15V | ||
let target_voltage = VSEL_A::VOLTAGE1_15; | ||
vreg::set_voltage(&mut state.vreg, target_voltage); | ||
let v = vreg::get_voltage(&mut state.vreg).unwrap(); | ||
assert!(v == target_voltage); | ||
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// Set the voltage to 1.20V | ||
let target_voltage = VSEL_A::VOLTAGE1_20; | ||
vreg::set_voltage(&mut state.vreg, target_voltage); | ||
let v = vreg::get_voltage(&mut state.vreg).unwrap(); | ||
assert!(v == target_voltage); | ||
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// Reset to default voltage (1.10V) | ||
let target_voltage = VSEL_A::VOLTAGE1_10; | ||
vreg::set_voltage(&mut state.vreg, target_voltage); | ||
let v = vreg::get_voltage(&mut state.vreg).unwrap(); | ||
assert!(v == target_voltage); | ||
} | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,37 @@ | ||
//! On-chip voltage regulator (VREG) | ||
//! | ||
//! See [Chapter 2, Section 10](https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf) of the datasheet for more details | ||
//! | ||
//! ## Usage | ||
//! ```no_run | ||
//! use rp2040_hal::pac::vreg_and_chip_reset::vreg::VSEL_A; | ||
//! use rp2040_hal::{vreg::set_voltage, pac}; | ||
//! let mut pac = pac::Peripherals::take().unwrap(); | ||
//! // Set voltage to 1.20V | ||
//! set_voltage(&mut pac.VREG_AND_CHIP_RESET, VSEL_A::VOLTAGE1_20); | ||
//! ``` | ||
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use crate::pac::vreg_and_chip_reset::vreg::VSEL_A; | ||
use crate::pac::VREG_AND_CHIP_RESET; | ||
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/// Set voltage to the on-chip voltage regulator. | ||
/// | ||
/// There is no guarantee that the device will operate at all of the available voltages. | ||
/// Appropriate values should be selected in consideration of the system clock frequency and other factors to be set. | ||
/// | ||
/// # Arguments | ||
/// | ||
/// * `vreg_dev` - VREG peripheral | ||
/// * `voltage` - Voltage to set | ||
pub fn set_voltage(vreg_dev: &mut VREG_AND_CHIP_RESET, voltage: VSEL_A) { | ||
vreg_dev.vreg().write(|w| w.vsel().variant(voltage)); | ||
} | ||
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/// Get voltage from the on-chip voltage regulator | ||
/// | ||
/// # Arguments | ||
/// | ||
/// * `vreg_dev` - VREG peripheral | ||
pub fn get_voltage(vreg_dev: &VREG_AND_CHIP_RESET) -> Option<VSEL_A> { | ||
vreg_dev.vreg().read().vsel().variant() | ||
} |
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How do we know that this test works reliably on every device?
The datasheet says: "Note that RP2040 may not operate reliably with its digital core supply (DVDD) at a voltage other than 1.1V."
Perhaps this test should only cover a smaller range of voltages, eg. 1.05 - 1.15V?
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In my experience, I have set the core voltage to 1.2V on more than 50 RP2040s and have never had a problem. Also, in the thread about overclocking on the RP2040, there is no example of a failure to increase the core voltage.
However, this is not normal usage, there is no guarantee that it will work reliably on all RP2040s.
I noticed that with the default system clock, lowering the core voltage too much can cause problems. It should be a smaller test case range, as you mentioned. Especially in the direction of lowering the core voltage.
1.20V should be fine, so i'll reduce it to 1.05 - 1.20V.
If you are concerned, I would reduce it more. Reducing it is easy:)