Merge pull request #777 from AkiyukiOkayasu/fix-typo

Fix typos

README.md

@@ -112,7 +112,7 @@ particular board.
 
 ### [BSPs] - Board support packages
 
-There are BSPs for various boards based on the RP2040 avaialble in
+There are BSPs for various boards based on the RP2040 available in
 a [separate repository][BSPs].
 
 [rp2040-hal]: https://github.com/rp-rs/rp-hal/tree/main/rp2040-hal
@@ -133,7 +133,7 @@ use the UF2 process.
 
 The RP2040 contains two Cortex-M0+ processors, which execute Thumb-2 encoded
 ARMv6-M instructions. There are no operating-specific features in the binaries
-produced - they are for 'bare-metal' systems. For compatibilty with other Arm
+produced - they are for 'bare-metal' systems. For compatibility with other Arm
 code (e.g. as produced by GCC), Rust uses the *Arm Embedded-Application Binary
 Interface* standard or EABI. Therefore, any Rust code for the RP2040 should be
 compiled with the target *`thumbv6m-none-eabi`*.

on-target-tests/tests/i2c_loopback_async.rs

@@ -59,7 +59,7 @@ mod tests {
     }
 
     #[test]
-    fn transations_iter(state: &mut State) {
+    fn transactions_iter(state: &mut State) {
         run_test(non_blocking::transaction(state, ADDR_7BIT, 7..=9));
         run_test(non_blocking::transaction(state, ADDR_10BIT, 7..=14));
     }

rp2040-hal/CHANGELOG.md

@@ -170,7 +170,7 @@ The Minimum-Supported Rust Version (MSRV) for this release is 1.62
 ### Added
 
 - Add docs.rs metadata - @icedrocket
-- Implement embedded-hal aplha SPI traits - @ptpaterson
+- Implement embedded-hal alpha SPI traits - @ptpaterson
 - Add derive(Debug) and derive(defmt::Format) to error types - @9names
 - Add ability to modify installed PIO program wrap bounds - @davidcole1340
 - Add rtic-monotonic support for timer & alarms (feature gated) - @ithinuel
@@ -252,7 +252,7 @@ The Minimum-Supported Rust Version (MSRV) for this release is 1.61
 ### Changed
 
 - Use thread send safe UART* marker when splitting, improves UART ergonmics - @marius-meissner
-- Improve performance for hardware division instrinsics. Internal intrinsics cleanup - @Sizurka
+- Improve performance for hardware division intrinsics. Internal intrinsics cleanup - @Sizurka
 - Provide a better alarm abstraction - @ithinuel
 - Update Multicore::spawn to be able to take a closure without requiring alloc.
   Improve Multicore ergonomics and add example for how to use new API - @Liamolucko

rp2040-hal/examples/multicore_fifo_blink.rs

@@ -48,7 +48,7 @@ const CORE1_TASK_COMPLETE: u32 = 0xEE;
 ///
 /// Core 0 gets its stack via the normal route - any memory not used by static values is
 /// reserved for stack and initialised by cortex-m-rt.
-/// To get the same for Core 1, we would need to compile everything seperately and
+/// To get the same for Core 1, we would need to compile everything separately and
 /// modify the linker file for both programs, and that's quite annoying.
 /// So instead, core1.spawn takes a [usize] which gets used for the stack.
 /// NOTE: We use the `Stack` struct here to ensure that it has 32-byte alignment, which allows

rp2040-hal/examples/multicore_polyblink.rs

@@ -53,7 +53,7 @@ const CORE1_DELAY: u32 = 1_000_000 / CORE1_FREQ;
 ///
 /// Core 0 gets its stack via the normal route - any memory not used by static
 /// values is reserved for stack and initialised by cortex-m-rt.
-/// To get the same for Core 1, we would need to compile everything seperately
+/// To get the same for Core 1, we would need to compile everything separately
 /// and modify the linker file for both programs, and that's quite annoying.
 /// So instead, core1.spawn takes a [usize] which gets used for the stack.
 /// NOTE: We use the `Stack` struct here to ensure that it has 32-byte

rp2040-hal/examples/pio_dma.rs

@@ -1,6 +1,6 @@
 //! This example shows how to read from and write to PIO using DMA.
 //!
-//! If a LED is connected to that pin, like on a Pico board, it will continously output "HELLO
+//! If a LED is connected to that pin, like on a Pico board, it will continuously output "HELLO
 //! WORLD" in morse code. The example also tries to read the data back. If reading the data fails,
 //! the message will only be shown once, and then the LED remains dark.
 //!

rp2040-hal/examples/pio_synchronized.rs

@@ -1,7 +1,7 @@
 //! This example toggles the GPIO0 and GPIO1 pins, with each controlled from a
 //! separate PIO state machine.
 //!
-//! Despite running in separate state machines, the clocks are sychronized at
+//! Despite running in separate state machines, the clocks are synchronized at
 //! the rise and fall times will be simultaneous.
 #![no_std]
 #![no_main]

rp2040-hal/examples/spi.rs

@@ -94,7 +94,7 @@ fn main() -> ! {
 
     // Write out 0, ignore return value
     if spi.write(&[0]).is_ok() {
-        // SPI write was succesful
+        // SPI write was successful
     };
 
     // write 50, then check the return

rp2040-hal/src/adc.rs

@@ -187,7 +187,7 @@ impl<P> AdcPin<P>
 where
     P: AnyPin,
 {
-    /// Captures the pin to be used with an ADC and disables its digital circuitery.
+    /// Captures the pin to be used with an ADC and disables its digital circuitry.
     pub fn new(pin: P) -> Result<Self, InvalidPinError> {
         let pin_id = pin.borrow().id();
         if (26..=29).contains(&pin_id.num) && pin_id.bank == DynBankId::Bank0 {
@@ -205,7 +205,7 @@ where
         }
     }
 
-    /// Release the pin and restore its digital circuitery's state.
+    /// Release the pin and restore its digital circuitry's state.
     pub fn release(self) -> P {
         let mut p = self.pin.into();
         p.set_output_disable(self.saved_output_disable);
@@ -412,7 +412,7 @@ impl Adc {
 
     /// Returns true if the ADC is ready for the next conversion.
     ///
-    /// This implies that any previous converison has finished.
+    /// This implies that any previous conversion has finished.
     pub fn is_ready(&self) -> bool {
         self.device.cs().read().ready().bit_is_set()
     }

rp2040-hal/src/clocks/macros.rs

@@ -73,7 +73,7 @@ macro_rules! clock {
             ($name, $reg, auxsrc={$($auxsrc: $aux_variant),*})
         }
 
-        divisable_clock!($name, $reg);
+        divisible_clock!($name, $reg);
 
         $crate::paste::paste!{
             $(impl ValidSrc<$name> for $src {
@@ -259,12 +259,12 @@ macro_rules! clock {
             ($name, $reg, auxsrc={$($auxsrc: $variant),*})
         }
 
-        divisable_clock!($name, $reg);
+        divisible_clock!($name, $reg);
         stoppable_clock!($name, $reg);
     };
 }
 
-macro_rules! divisable_clock {
+macro_rules! divisible_clock {
     ($name:ident, $reg:ident) => {
         $crate::paste::paste! {
             impl ClockDivision for $name {

rp2040-hal/src/clocks/mod.rs

@@ -328,7 +328,7 @@ pub trait ClockSource: Sealed {
     fn get_freq(&self) -> HertzU32;
 }
 
-/// Trait to contrain which ClockSource is valid for which Clock
+/// Trait to constrain which ClockSource is valid for which Clock
 pub trait ValidSrc<C: Clock>: Sealed + ClockSource {
     /// Is this a ClockSource for src or aux?
     fn is_aux(&self) -> bool;

rp2040-hal/src/gpio/mod.rs

@@ -34,7 +34,7 @@
 //
 // - The user must not be able to instantiate by themselves nor obtain an instance of the Type-level
 //   structure.
-// - non-typestated features (overides, irq configuration, pads' output disable, pad's input
+// - non-typestated features (overrides, irq configuration, pads' output disable, pad's input
 //   enable, drive strength, schmitt, slew rate, sio's in sync bypass) are considered somewhat
 //   advanced usage of the pin (relative to reading/writing a gpio) and it is the responsibility of
 //   the user to make sure these are in a correct state when converting and passing the pin around.
@@ -223,7 +223,7 @@ impl<I: PinId, F: func::Function, P: PullType> Pin<I, F, P> {
 
     /// # Safety
     /// This method does not check if the pin is actually configured as the target function or pull
-    /// mode. This may lead to inconcistencies between the type-state and the actual state of the
+    /// mode. This may lead to inconsistencies between the type-state and the actual state of the
     /// pin's configuration.
     pub unsafe fn into_unchecked<F2: func::Function, P2: PullType>(self) -> Pin<I, F2, P2> {
         Pin {
@@ -483,7 +483,7 @@ impl<I: PinId, F: func::Function, P: PullType> Pin<I, F, P> {
             .modify(|_, w| w.slewfast().bit(OutputSlewRate::Fast == rate));
     }
 
-    /// Get wether the schmitt trigger (hysteresis) is enabled.
+    /// Get whether the schmitt trigger (hysteresis) is enabled.
     #[inline]
     pub fn get_schmitt_enabled(&self) -> bool {
         self.id.pad_ctrl().read().schmitt().bit_is_set()
@@ -495,25 +495,25 @@ impl<I: PinId, F: func::Function, P: PullType> Pin<I, F, P> {
         self.id.pad_ctrl().modify(|_, w| w.schmitt().bit(enable));
     }
 
-    /// Get the state of the digital output circuitery of the pad.
+    /// Get the state of the digital output circuitry of the pad.
     #[inline]
     pub fn get_output_disable(&mut self) -> bool {
         self.id.pad_ctrl().read().od().bit_is_set()
     }
 
-    /// Set the digital output circuitery of the pad.
+    /// Set the digital output circuitry of the pad.
     #[inline]
     pub fn set_output_disable(&mut self, disable: bool) {
         self.id.pad_ctrl().modify(|_, w| w.od().bit(disable));
     }
 
-    /// Get the state of the digital input circuitery of the pad.
+    /// Get the state of the digital input circuitry of the pad.
     #[inline]
     pub fn get_input_enable(&mut self) -> bool {
         self.id.pad_ctrl().read().ie().bit_is_set()
     }
 
-    /// Set the digital input circuitery of the pad.
+    /// Set the digital input circuitry of the pad.
     #[inline]
     pub fn set_input_enable(&mut self, enable: bool) {
         self.id.pad_ctrl().modify(|_, w| w.ie().bit(enable));
@@ -813,7 +813,7 @@ impl<I: PinId, C: SioConfig, P: PullType> Pin<I, FunctionSio<C>, P> {
 
     /// Bypass the input sync stages.
     ///
-    /// This saves two clock cycles in the input signal's path at the risks of intruducing metastability.
+    /// This saves two clock cycles in the input signal's path at the risks of introducing metastability.
     #[inline]
     pub fn set_sync_bypass(&mut self, bypass: bool) {
         let mask = self.id.mask();
@@ -930,7 +930,7 @@ where
 }
 
 /// Deprecated: Instead of implicitly implementing InputPin for function SioOutput,
-/// use `pin.as_input()` to get access to input values indepentent of the selected function.
+/// use `pin.as_input()` to get access to input values independent of the selected function.
 impl<I, P> embedded_hal_0_2::digital::v2::InputPin for Pin<I, FunctionSio<SioOutput>, P>
 where
     I: PinId,

rp2040-hal/src/gpio/pull.rs

@@ -8,7 +8,7 @@ pub(crate) mod pull_sealed {
         fn as_dyn(&self) -> DynPullType;
     }
 }
-/// Type-level `enum` for pull resitor types.
+/// Type-level `enum` for pull resistor types.
 pub trait PullType: pull_sealed::PullType {}
 
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -23,7 +23,7 @@ pub enum DynPullType {
     Down,
     /// This enables bus-keep mode.
     ///
-    /// This is not documented in the datasheet but discribed in the
+    /// This is not documented in the datasheet but described in the
     /// [c-sdk](https://github.com/raspberrypi/pico-sdk/blob/e7267f99febc70486923e17a8210088af058c915/src/rp2_common/hardware_gpio/gpio.c#L53)
     /// as:
     ///

rp2040-hal/src/i2c/controller.rs

@@ -105,7 +105,7 @@ where
             // Enable clock stretching.
             // Will hold clock when:
             // - receiving and rx fifo is full
-            // - writting and tx fifo is empty
+            // - writing and tx fifo is empty
             i2c.ic_con()
                 .modify(|_, w| w.rx_fifo_full_hld_ctrl().enabled());
         }
@@ -191,7 +191,7 @@ impl<T: Deref<Target = Block>, PINS> I2C<T, PINS, Controller> {
     }
 
     #[inline]
-    fn poll_stop_deteced(&mut self) -> Poll<()> {
+    fn poll_stop_detected(&mut self) -> Poll<()> {
         if self.i2c.ic_raw_intr_stat().read().stop_det().is_inactive() {
             Poll::Pending
         } else {
@@ -309,8 +309,8 @@ impl<T: Deref<Target = Block>, PINS> I2C<T, PINS, Controller> {
 
         if abort_reason.is_err() || do_stop {
             // If the transaction was aborted or if it completed
-            // successfully wait until the STOP condition has occured.
-            while self.poll_stop_deteced().is_pending() {}
+            // successfully wait until the STOP condition has occurred.
+            while self.poll_stop_detected().is_pending() {}
             self.i2c.ic_clr_stop_det().read().clr_stop_det();
         }
         // Note: the hardware issues a STOP automatically on an abort condition.

rp2040-hal/src/i2c/controller/non_blocking.rs

@@ -219,10 +219,10 @@ where
 
         if abort_reason.is_err() || do_stop {
             // If the transaction was aborted or if it completed
-            // successfully wait until the STOP condition has occured.
+            // successfully wait until the STOP condition has occurred.
             CPFn::new(
                 self,
-                Self::poll_stop_deteced,
+                Self::poll_stop_detected,
                 Self::unmask_stop_det,
                 Self::cancel,
             )

rp2040-hal/src/i2c/peripheral.rs

@@ -19,7 +19,7 @@
 //!   The I2C block holds the SCL line (clock stretching) until there is room for more data in the
 //!   Rx FIFO using [`read`](I2C::read).  
 //!   Data are automatically acknowledged by the I2C block and it is not possible to NACK incoming
-//!   data comming to the rp2040.
+//!   data coming to the rp2040.
 //!
 //! ## Warning
 //!
@@ -30,7 +30,7 @@
 //!
 //! Because a Read operation will always cause a pause waiting for the firmware's input, a `Start`
 //! (or `Restart` if the peripheral is already active) will always be reported. However, this does
-//! not mean no other event occured in the mean time.
+//! not mean no other event occurred in the mean time.
 //!
 //! For example, let's consider the following sequence:
 //!

rp2040-hal/src/multicore.rs

@@ -208,14 +208,14 @@ impl<'p> Core<'p> {
 
             let mut stack_ptr = stack.as_mut_ptr_range().end;
             // on rp2040, usize are 4 bytes, so align_offset(8) on a *mut usize returns either 0 or 1.
-            let misalignement_offset = stack_ptr.align_offset(8);
+            let misalignment_offset = stack_ptr.align_offset(8);
 
             // We don't want to drop this, since it's getting moved to the other core.
             let mut entry = ManuallyDrop::new(entry);
 
             // Push the arguments to `core1_startup` onto the stack.
             unsafe {
-                stack_ptr = stack_ptr.sub(misalignement_offset);
+                stack_ptr = stack_ptr.sub(misalignment_offset);
 
                 // Push `stack_limit`.
                 stack_ptr = stack_ptr.sub(1);

rp2040-hal/src/rtc/mod.rs

@@ -75,7 +75,7 @@ impl RealTimeClock {
         Ok(result)
     }
 
-    /// Enable or disable the leap year check. The rp2040 chip will always add a Feb 29th on every year that is divisable by 4, but this may be incorrect (e.g. on century years). This function allows you to disable this check.
+    /// Enable or disable the leap year check. The rp2040 chip will always add a Feb 29th on every year that is divisible by 4, but this may be incorrect (e.g. on century years). This function allows you to disable this check.
     ///
     /// Leap year checking is enabled by default.
     pub fn set_leap_year_check(&mut self, leap_year_check_enabled: bool) {

rp2040-hal/src/sio.rs

@@ -664,7 +664,7 @@ impl LaneCtrl {
     }
 }
 
-///Trait representing the functionnality of a single lane of an interpolator.
+///Trait representing the functionality of a single lane of an interpolator.
 pub trait Lane: Sealed {
     ///Read the lane result, and simultaneously write lane results to both accumulators.
     fn pop(&mut self) -> u32;
@@ -688,7 +688,7 @@ pub trait Lane: Sealed {
     fn read_raw(&self) -> u32;
 }
 
-///Trait representing the functionnality of an interpolator.
+///Trait representing the functionality of an interpolator.
 /// ```no_run
 /// use rp2040_hal::sio::{Sio,LaneCtrl,Lane};
 /// use rp2040_hal::pac;

rp2040-hal/src/spi.rs

@@ -216,7 +216,7 @@ impl<S: State, D: SpiDevice, P: ValidSpiPinout<D>, const DS: u8> Spi<S, D, P, DS
         // post-divide. Prescale is an even number from 2 to 254 inclusive.
         for prescale_option in (2u32..=254).step_by(2) {
             // We need to use an saturating_mul here because with a high baudrate certain invalid prescale
-            // values might not fit in u32. However we can be sure those values exeed the max sys_clk frequency
+            // values might not fit in u32. However we can be sure those values exceed the max sys_clk frequency
             // So clamping a u32::MAX is fine here...
             if freq_in < ((prescale_option + 2) * 256).saturating_mul(baudrate) {
                 prescale = prescale_option as u8;

rp2040-hal/src/usb.rs

@@ -37,10 +37,10 @@
 //! ## Enumeration issue with small EP0 max packet size
 //!
 //! During enumeration Windows hosts send a `StatusOut` after the `DataIn` packet of the first
-//! `Get Descriptor` resquest even if the `DataIn` isn't completed (typically when the `max_packet_size_ep0`
+//! `Get Descriptor` request even if the `DataIn` isn't completed (typically when the `max_packet_size_ep0`
 //! is less than 18bytes). The next request is a `Set Address` that expect a `StatusIn`.
 //!
-//! The issue is that by the time the previous `DataIn` packet is acknoledged and the `StatusOut`
+//! The issue is that by the time the previous `DataIn` packet is acknowledged and the `StatusOut`
 //! followed by `Setup` are received, the usb stack may have already prepared the next `DataIn` payload
 //! in the EP0 IN mailbox resulting in the payload being transmitted to the host instead of the
 //! `StatusIn` for the `Set Address` request as expected by the host.