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Initial version
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ved-rivos authored Dec 27, 2023
2 parents 529fdea + 4757fab commit c5e79c9
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10 changes: 5 additions & 5 deletions Makefile
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Expand Up @@ -13,13 +13,13 @@
# the Doc Template for RISC-V Extensions.

DATE ?= $(shell date +%Y-%m-%d)
VERSION ?= v0.0.0
REVMARK ?= Draft
VERSION ?= v0.7.0
REVMARK ?= Development
DOCKER_RUN := docker run --rm -v ${PWD}:/build -w /build \
riscvintl/riscv-docs-base-container-image:latest

HEADER_SOURCE := header.adoc
PDF_RESULT := spec-sample.pdf
PDF_RESULT := riscv-svvptc.pdf

ASCIIDOCTOR_PDF := asciidoctor-pdf
OPTIONS := --trace \
Expand All @@ -29,7 +29,7 @@ OPTIONS := --trace \
-a revremark=${REVMARK} \
-a revdate=${DATE} \
-a pdf-fontsdir=docs-resources/fonts \
-a pdf-theme=docs-resources/themes/riscv-pdf.yml \
-a pdf-style=docs-resources/themes/riscv-pdf.yml \
--failure-level=ERROR
REQUIRES := --require=asciidoctor-bibtex \
--require=asciidoctor-diagram \
Expand All @@ -41,7 +41,7 @@ all: build

build:
@echo "Checking if Docker is available..."
@if command -v docker >/dev/null 2>&1 ; then \
@if command -v docker &> /dev/null ; then \
echo "Docker is available, building inside Docker container..."; \
$(MAKE) build-container; \
else \
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4 changes: 0 additions & 4 deletions bibliography.adoc

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47 changes: 0 additions & 47 deletions chapter2.adoc

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7 changes: 0 additions & 7 deletions contributors.adoc

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69 changes: 46 additions & 23 deletions header.adoc
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= RISC-V Example Specification Document (Zexmpl)
Authors: Author 1, Author 2
:docgroup: RISC-V Task Group
:description: RISC-V Example Specification Document (Zexmpl)
[[header]]
:description: No Invalid PTEs in Adddress-Translation Caches (Svvptc)
:company: RISC-V.org
:revdate: 1/2023
:revnumber: 1.0
:revremark: This document is under development. Expect potential changes. Visit http://riscv.org/spec-state for further details.
:revinfo:
:revdate: 12/2023
:revnumber: 0.7
:revremark: This document is in development state. See http://riscv.org/spec-state for details.
:url-riscv: http://riscv.org
:doctype: book
:preface-title: Preamble
:colophon:
:appendix-caption: Appendix
:imagesdir: docs-resources/images
:imagesdir: images
:title-logo-image: image:risc-v_logo.png[pdfwidth=3.25in,align=center]
// Settings:
:experimental:
:reproducible:
// needs to be changed? bug discussion started
//:WaveDromEditorApp: app/wavedrom-editor.app
:imagesoutdir: docs-resources/images
:bibtex-file: example.bib
:bibtex-order: alphabetical
:bibtex-style: apa
:imagesoutdir: images
:bibtex-file: svvptc.bib
:bibtex-order: occurrence
:bibtex-style: ieee
:icons: font
:lang: en
:listing-caption: Listing
Expand All @@ -38,16 +36,19 @@ endif::[]
:footnote:
:xrefstyle: short

= No Invalid PTEs in Adddress-Translation Caches (Svvptc)

// Preamble
[WARNING]
.This document is in the link:http://riscv.org/spec-state[Development state]
====
Expect potential changes. This draft specification is likely to evolve before
it is accepted as a standard. Implementations based on this draft
may not conform to the future standard.
Assume everything can change. This draft specification will change before being
accepted as standard, so implementations made to this draft specification will
likely not conform to the future standard.
====

[preface]
== Copyright and license information
=== Copyright and license information
This specification is licensed under the Creative Commons
Attribution 4.0 International License (CC-BY 4.0). The full
license text is available at
Expand All @@ -56,11 +57,33 @@ https://creativecommons.org/licenses/by/4.0/.
Copyright 2023 by RISC-V International.

[preface]
include::contributors.adoc[]
=== Contributors
This RISC-V specification has been contributed to directly or indirectly by:
Ved Shanbhogue

== No Invalid PTEs in Adddress-Translation Caches (Svvptc)

include::intro.adoc[]
include::chapter2.adoc[]
When the Svvptc extension is implemented, explicit stores in a hart that update
the Valid bit of a leaf or non-leaf PTEs from 0 to 1 are ordered before and
visible to implicit references in that hart to the memory-management data
structures by instructions subsequent to a memory-management fence instruction
or an `__x__RET` instruction, whichever occurs first after the stores that
update the PTEs.

// The index must precede the bibliography
include::index.adoc[]
include::bibliography.adoc[]
[NOTE]
====
This extension effectively prohibits the caching of PTEs whose Valid bits are
clear in address-translation cache entries. Consequently, updating the Valid bit
from 0 to 1 for either leaf or non-leaf PTEs does not require a memory-management
fence to invalidate cached copies of them from any address-translation caches.
Commonly, PTEs are marked as Valid in response to a page-fault exception or a
system call, such as one that maps memory regions. In such scenarios, the trap
handler typically uses an `__x__RET` to return from the trap. The store operation
used by the trap handler to update the Valid bit of the PTEs from 0 to 1 are
ordered before and visible to the implicit references to the updated
memory-management data structures by instructions subsequent to the `__x__RET`
such as the instruction that raised the page-fault exception or the instructions
that access the newly mapped memory ranges. The use of a memory-management fence
is not necessary in such cases.
====
15 changes: 0 additions & 15 deletions intro.adoc

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4 changes: 2 additions & 2 deletions readme.adoc
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= Svvptc - No caching of invalid PTEs Extension
= Svvptc - No Caching of Invalid PTEs Extension

== License

This work is licensed under a Creative Commons Attribution 4.0 International License (CC-BY-4.0). For details, see the link:LICENSE[LICENSE] file.

== Contributors

The list of contributors to this specification is maintained in the link:contributors.adoc[contributors] file.
The list of contributors to this specification is maintained in the link:header.adoc[contributors] file.

For guidelines on how to contribute, refer to the link:CONTRIBUTING.md[CONTRIBUTING] file.

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