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update copyright and contributors
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ved-rivos committed Jan 29, 2024
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[[header]]
:description: Eliding Memory-Management Fences on Making PTEs Valid (Svvptc)
:company: RISC-V.org
:revdate: 12/2023
:revnumber: 0.7
:revremark: This document is in development state. See http://riscv.org/spec-state for details.
:revdate: 01/2024
:revnumber: 1.0
:revremark: This document is in Stable state. See http://riscv.org/spec-state for details.
:url-riscv: http://riscv.org
:doctype: book
:preface-title: Preamble
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// Preamble
[WARNING]
.This document is in the link:http://riscv.org/spec-state[Development state]
.This document is in the link:http://riscv.org/spec-state[Stable state]
====
Assume everything can change. This draft specification will change before being
accepted as standard, so implementations made to this draft specification will
likely not conform to the future standard.
Assume anything could still change, but limited change should be expected.
This draft specification will change before being accepted as standard, so
implementations made to this draft specification will likely not conform to
the future standard.
====

[preface]
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license text is available at
https://creativecommons.org/licenses/by/4.0/.

Copyright 2023 by RISC-V International.
Copyright 2024 by RISC-V International.

[preface]
=== Contributors
This RISC-V specification has been contributed to directly or indirectly by:
Ved Shanbhogue, Andrew Waterman, Greg Favor, Krste Asanovic
Alexander Ghiti, Andrew Waterman, Greg Favor, Krste Asanovic, Ved Shanbhogue

== Eliding Memory-Management Fences on Making PTEs Valid (Svvptc)

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