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Merge updates-2.0.4 to branch
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IainCRobertson committed Oct 24, 2024
2 parents 326a9b5 + 8e8220f commit 4853a37
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Expand Up @@ -3,7 +3,7 @@ Gajinder Panesar <[email protected]>, Iain Robertson <iain.robertson@si
:description: Efficient Trace for RISC-V
:company: RISC-V.org
:revdate: TBD, 2024
:revnumber: 2.0.4
:revnumber: 2.0
:url-riscv: http://riscv.org
:doctype: book
:pdf-theme: docs-resources/themes/riscv-pdf.yml
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[%autowidth,align="center",float="center",cols="<,<",options="header"]
|===
|2.0|Baseline
|2.0.1 |Clarifications only - no changes to normative behaviour. +
|15-Dec-2023 |Clarifications only - no changes to normative behaviour. +
- Control field definitions removed from section 2, which now references the xref:https://github.com/riscv-non-isa/tg-nexus-trace/blob/master/docs/RISC-V-Trace-Control-Interface.adoc[RISC-V Trace Control Interface Specification] +
- Added detail on handling of multi-load/store instructions for data trace to <<sec:DataInterfaceRequirements>>. +
- Removed references to tail-calls in jump classifications in <<sec:InstructionInterfaceRequirements>>. +
- Corrected typos where `lrid` was inadvertently refered to by an earlier name (`index`) in <<sec:data-loadstore>>. +
- Corrected reference decoder in <<Decoder>> to cover a corner-case related to trap returns.
|2.0.2 |First version in AsciiDoc format.
|2.0.3 |Formatting and typo fixes.
|2.0.4 |Details to follow.
|05-Mar-2024 |First version in AsciiDoc format.
|19-Apr-2024 |Formatting and typo fixes.
|TBD |Details to follow.
|===

[preface]
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