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clarify recorded means writes and overwrites
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ved-rivos committed Mar 30, 2024
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16 changes: 10 additions & 6 deletions reri_err_reporting.adoc
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Expand Up @@ -790,8 +790,11 @@ global counter (e.g, mtime, etc.), or other implementation specific means.
[[OVERWRITE_RULES]]
=== Error Record Overwrite Rules

When a hardware unit detects an error it may find its error record still valid
due to an earlier detected error that has not yet been consumed by software.
When a hardware unit detects an error and its error record is not valid, it
writes the error record with the error information and marks the record as
valid. However, if the error record is already valid, owing to an earlier
detected but unprocessed error, the decision to overwrite the error record with
new error information is determined by the new error's severity and/or priority.

The overwrite rules allow a higher severity error to overwrite a lower severity
error. UEC has the highest severity, followed by UED, then CE, and finally, informational. When the two
Expand All @@ -807,6 +810,11 @@ When an error writes or overwrites an error record, the `status_i.cec` and
severity. When implemented, `cec` counts CE occurrences; unsigned integer
overflow on `cec` increment sets `ceco` to 1.

Whenever a new error writes to or overwrites an error record, the signal
configured in the `control_i` register for its severity level is asserted. When
`status_i.ceco` changes from 0 to 1, the signal configured in `control_i.ces` is
asserted.

<<<

[[REC_WRITE_RULE]]
Expand Down Expand Up @@ -887,10 +895,6 @@ error. And yet another implementation may choose to record one of the errors as
determined by implementation specific rules.
====

When a new error is recorded by the hardware unit in the `status_i` register of its
error record then the signal configured in the `control_i` register for error is
asserted.

=== Error Reporting Defined by Other Standards

Standards such as PCIe cite:[PCI] and CXL cite:[CXL] define standardized error
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