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[bibliography] | ||
== References | ||
== Bibliography | ||
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* link:https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0.0/riscv-iommu.pdf[RISC-V IOMMU Specification], v1.0.0 | ||
* link:https://uefi.org/specs/ACPI/6.5/[ACPI Specification], Version: v6.5 | ||
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// REVISIT | ||
//bibliography::[] | ||
bibliography::[] |
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== Introduction | ||
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The RISC-V IO Mapping Table (RIMT) provides information about the RISC-V IOMMU and the relationship | ||
between the IO topology and the IOMMU in ACPI based RISC-V platforms. The RIMT identifies which | ||
components are behind IOMMU and how they are connected together. RISC-V IOMMU can be implemented as | ||
either a PCI device or a platform device. | ||
The RISC-V IO Mapping Table (RIMT) provides information about the RISC-V IOMMU | ||
cite:[IOMMU-SPEC] and the relationship between the IO topology and the IOMMU in | ||
ACPI cite:[ACPI-SPEC] based RISC-V platforms. The RIMT identifies which | ||
components are behind IOMMU and how they are connected together. RISC-V IOMMU | ||
can be implemented as either a PCI device or a platform device. |
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