Skip to content

Commit

Permalink
target/riscv: Adding register tables to make register names consisten…
Browse files Browse the repository at this point in the history
…t #31163

Signed-off-by: Anastasiya Chernikova <[email protected]>
  • Loading branch information
Anastasiya Chernikova committed Aug 3, 2023
1 parent c07d925 commit 85cde23
Show file tree
Hide file tree
Showing 5 changed files with 237 additions and 472 deletions.
2 changes: 1 addition & 1 deletion src/target/riscv/gdb_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,6 @@ enum gdb_regno {
GDB_REGNO_COUNT
};

const char *gdb_regno_name(enum gdb_regno regno);
const char *gdb_regno_name(struct target *target, enum gdb_regno regno);

#endif
6 changes: 3 additions & 3 deletions src/target/riscv/riscv-011.c
Original file line number Diff line number Diff line change
Expand Up @@ -1042,7 +1042,7 @@ static int read_remote_csr(struct target *target, uint64_t *value, uint32_t csr)
uint32_t exception = cache_get32(target, info->dramsize-1);
if (exception) {
LOG_WARNING("Got exception 0x%x when reading %s", exception,
gdb_regno_name(GDB_REGNO_CSR0 + csr));
gdb_regno_name(target, GDB_REGNO_CSR0 + csr));
*value = ~0;
return ERROR_FAIL;
}
Expand Down Expand Up @@ -1243,7 +1243,7 @@ static int register_read(struct target *target, riscv_reg_t *value, int regnum)

uint32_t exception = cache_get32(target, info->dramsize-1);
if (exception) {
LOG_WARNING("Got exception 0x%x when reading %s", exception, gdb_regno_name(regnum));
LOG_WARNING("Got exception 0x%x when reading %s", exception, gdb_regno_name(target, regnum));
*value = ~0;
return ERROR_FAIL;
}
Expand Down Expand Up @@ -1318,7 +1318,7 @@ static int register_write(struct target *target, unsigned int number,
uint32_t exception = cache_get32(target, info->dramsize-1);
if (exception) {
LOG_WARNING("Got exception 0x%x when writing %s", exception,
gdb_regno_name(number));
gdb_regno_name(target, number));
return ERROR_FAIL;
}

Expand Down
22 changes: 11 additions & 11 deletions src/target/riscv/riscv-013.c
Original file line number Diff line number Diff line change
Expand Up @@ -966,7 +966,7 @@ static uint32_t access_register_command(struct target *target, uint32_t number,
break;
default:
LOG_TARGET_ERROR(target, "%d-bit register %s not supported.",
size, gdb_regno_name(number));
size, gdb_regno_name(target, number));
assert(0);
}

Expand Down Expand Up @@ -1202,7 +1202,7 @@ static int prep_for_register_access(struct target *target,
return ERROR_OK;

LOG_TARGET_DEBUG(target, "Preparing mstatus to access %s",
gdb_regno_name(regno));
gdb_regno_name(target, regno));

assert(target->state == TARGET_HALTED &&
"The target must be halted to modify and then restore mstatus");
Expand All @@ -1222,7 +1222,7 @@ static int prep_for_register_access(struct target *target,
return ERROR_FAIL;

LOG_TARGET_DEBUG(target, "Prepared to access %s (mstatus=0x%" PRIx64 ")",
gdb_regno_name(regno), new_mstatus);
gdb_regno_name(target, regno), new_mstatus);
return ERROR_OK;
}

Expand Down Expand Up @@ -1480,7 +1480,7 @@ static int register_read_progbuf(struct target *target, uint64_t *value,
if (riscv_program_csrr(&program, S0, number) != ERROR_OK)
return ERROR_FAIL;
} else {
LOG_TARGET_ERROR(target, "Unsupported register: %s", gdb_regno_name(number));
LOG_TARGET_ERROR(target, "Unsupported register: %s", gdb_regno_name(target, number));
return ERROR_FAIL;
}

Expand Down Expand Up @@ -1594,7 +1594,7 @@ static int register_write_direct(struct target *target, enum gdb_regno number,
riscv_reg_t value)
{
LOG_TARGET_DEBUG(target, "Writing 0x%" PRIx64 " to %s", value,
gdb_regno_name(number));
gdb_regno_name(target, number));

if (target->state != TARGET_HALTED)
return register_write_abstract(target, number, value);
Expand All @@ -1612,7 +1612,7 @@ static int register_write_direct(struct target *target, enum gdb_regno number,
return ERROR_FAIL;

if (result == ERROR_OK)
LOG_TARGET_DEBUG(target, "%s <- 0x%" PRIx64, gdb_regno_name(number),
LOG_TARGET_DEBUG(target, "%s <- 0x%" PRIx64, gdb_regno_name(target, number),
value);

return result;
Expand All @@ -1622,7 +1622,7 @@ static int register_write_direct(struct target *target, enum gdb_regno number,
static int register_read_direct(struct target *target, riscv_reg_t *value,
enum gdb_regno number)
{
LOG_TARGET_DEBUG(target, "Reading %s", gdb_regno_name(number));
LOG_TARGET_DEBUG(target, "Reading %s", gdb_regno_name(target, number));

if (target->state != TARGET_HALTED)
return register_read_abstract(target, value, number);
Expand All @@ -1641,7 +1641,7 @@ static int register_read_direct(struct target *target, riscv_reg_t *value,
return ERROR_FAIL;

if (result == ERROR_OK)
LOG_TARGET_DEBUG(target, "%s = 0x%" PRIx64, gdb_regno_name(number),
LOG_TARGET_DEBUG(target, "%s = 0x%" PRIx64, gdb_regno_name(target, number),
*value);

return result;
Expand Down Expand Up @@ -2327,7 +2327,7 @@ static int riscv013_get_register_buf(struct target *target,
} else {
LOG_TARGET_ERROR(target,
"Failed to execute vmv/vslide1down while reading %s",
gdb_regno_name(regno));
gdb_regno_name(target, regno));
break;
}
}
Expand Down Expand Up @@ -4604,7 +4604,7 @@ struct target_type riscv013_target = {
static int riscv013_get_register(struct target *target,
riscv_reg_t *value, enum gdb_regno rid)
{
LOG_TARGET_DEBUG(target, "reading register %s", gdb_regno_name(rid));
LOG_TARGET_DEBUG(target, "reading register %s", gdb_regno_name(target, rid));

if (dm013_select_target(target) != ERROR_OK)
return ERROR_FAIL;
Expand Down Expand Up @@ -4634,7 +4634,7 @@ static int riscv013_set_register(struct target *target, enum gdb_regno rid,
riscv_reg_t value)
{
LOG_TARGET_DEBUG(target, "writing 0x%" PRIx64 " to register %s",
value, gdb_regno_name(rid));
value, gdb_regno_name(target, rid));

if (dm013_select_target(target) != ERROR_OK)
return ERROR_FAIL;
Expand Down
Loading

0 comments on commit 85cde23

Please sign in to comment.