Option for qspi instruction

.github/workflows/ci.yml

@@ -22,7 +22,7 @@ jobs:
           - stm32h7b3
           - stm32h7b0
     env:                        # Peripheral Feature flags
-      FLAGS: rt,quadspi,sdmmc,fmc,usb_hs,rtc,ethernet,ltdc,crc
+      FLAGS: rt,xspi,sdmmc,fmc,usb_hs,rtc,ethernet,ltdc,crc
 
     steps:
       - uses: actions/checkout@v2

.github/workflows/nightly.yml

@@ -19,7 +19,7 @@ jobs:
           - log-semihost
           - log-rtt
     env:                        # Peripheral Feature flags
-      FLAGS: rt,quadspi,sdmmc,fmc,usb_hs,rtc,ethernet,ltdc,crc
+      FLAGS: rt,xspi,sdmmc,fmc,usb_hs,rtc,ethernet,ltdc,crc
 
     steps:
       - uses: actions/checkout@v2

CHANGELOG.md

@@ -2,6 +2,8 @@
 
 ## [Unreleased]
 
+* **Breaking**: Rename the `quadspi` flag to `xspi`
+
 ## [v0.9.0] 2021-03-12
 
 * Updates `cortex-m` to v0.7.1. `cortex-m` v0.6.5+ [are forward compatible with

Cargo.toml

@@ -84,7 +84,7 @@ cm4 = []
 cm7 = []
 smps = []
 ltdc = ["embedded-display-controller"]
-quadspi = []
+xspi = []
 fmc = ["stm32-fmc"]
 sdmmc = ["sdio-host"]
 ethernet = ["smoltcp"]
@@ -141,7 +141,11 @@ required-features = ["fmc"]
 
 [[example]]
 name = "qspi"
-required-features = ["quadspi", "rm0433"]
+required-features = ["xspi", "rm0433"]
+
+[[example]]
+name = "octospi"
+required-features = ["xspi", "rm0468"]
 
 [[example]]
 name = "sdmmc"

examples/octospi.rs

@@ -0,0 +1,98 @@
+//! OCTOSPI peripheral example in indirect mode
+//!
+//! Tested on a STM32H735G-DK with a Macronix MX25LM51245GXDI00
+
+#![deny(warnings)]
+#![no_main]
+#![no_std]
+
+#[macro_use]
+mod utilities;
+
+use cortex_m_rt::entry;
+use stm32h7xx_hal::rcc::rec::{OctospiClkSel, OctospiClkSelGetter};
+use stm32h7xx_hal::{
+    pac, prelude::*, xspi::OctospiMode, xspi::OctospiWord as XW,
+};
+
+use log::info;
+
+#[entry]
+fn main() -> ! {
+    utilities::logger::init();
+    let dp = pac::Peripherals::take().unwrap();
+
+    // Constrain and Freeze power
+    let pwr = dp.PWR.constrain();
+    let pwrcfg = example_power!(pwr).freeze();
+
+    // Constrain and Freeze clock
+    let rcc = dp.RCC.constrain();
+    let ccdr = rcc.sys_ck(96.mhz()).freeze(pwrcfg, &dp.SYSCFG);
+
+    // Octospi from HCLK at 48MHz
+    assert_eq!(ccdr.clocks.hclk().0, 48_000_000);
+    assert_eq!(
+        ccdr.peripheral.OCTOSPI1.get_kernel_clk_mux(),
+        OctospiClkSel::RCC_HCLK3
+    );
+
+    // Acquire the GPIO peripherals. This also enables the clock for
+    // the GPIOs in the RCC register.
+    let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
+    let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
+    let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
+    let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
+
+    let _ncs = gpiog.pg6.into_alternate_af10();
+    let _clk = gpiof.pf10.into_alternate_af9();
+    let _io0 = gpiod.pd11.into_alternate_af9();
+    let _io1 = gpiod.pd12.into_alternate_af9();
+    let _io2 = gpioe.pe2.into_alternate_af9();
+    let _io3 = gpiod.pd13.into_alternate_af9();
+    let _io4 = gpiod.pd4.into_alternate_af10();
+    let _io5 = gpiod.pd5.into_alternate_af10();
+    let _io6 = gpiog.pg9.into_alternate_af9();
+    let _io7 = gpiod.pd7.into_alternate_af10();
+
+    info!("");
+    info!("stm32h7xx-hal example - OCTOSPI");
+    info!("");
+
+    // Initialise the OCTOSPI peripheral.
+    let mut octospi = dp.OCTOSPI1.octospi_unchecked(
+        12.mhz(),
+        &ccdr.clocks,
+        ccdr.peripheral.OCTOSPI1,
+    );
+
+    octospi.configure_mode(OctospiMode::OneBit).unwrap();
+
+    // RDID Read Identification. Abuses address as instruction phase, but that
+    // works in SPI mode.
+    let mut read: [u8; 3] = [0; 3];
+    octospi.read(0x9F, &mut read).unwrap();
+    info!("Read with instruction 0x9F : {:x?}", read);
+
+    // Switch Macronix MX25LM51245GXDI00 to SDR OPI
+    // Set WREN bit
+    octospi
+        .write_extended(XW::U8(0x06), XW::None, XW::None, &[])
+        .unwrap();
+    // Write Configuration Register 2
+    octospi
+        .write_extended(XW::U8(0x72), XW::U32(0), XW::None, &[1])
+        .unwrap();
+    // Change bus mode
+    octospi.configure_mode(OctospiMode::EightBit).unwrap();
+
+    // RDID Read Identification
+    let mut read: [u8; 3] = [0; 3];
+    octospi
+        .read_extended(XW::U16(0x9F60), XW::U32(0), XW::None, 4, &mut read)
+        .unwrap();
+
+    info!("Read with instruction 0x9F60 : {:x?}", read);
+
+    loop {}
+}

examples/qspi.rs

@@ -6,7 +6,7 @@
 mod utilities;
 
 use cortex_m_rt::entry;
-use stm32h7xx_hal::{pac, prelude::*, qspi::QspiMode};
+use stm32h7xx_hal::{pac, prelude::*, xspi::QspiMode};
 
 use log::info;
 

src/lib.rs

@@ -23,7 +23,7 @@
 //! * [Serial Peripheral Interface (SPI)](crate::spi)
 //! * [Serial Data (USART/UART)](crate::serial)
 //! * [Serial Audio Interface](crate::sai)
-//! * [Quad SPI](crate::qspi) Feature gate `qspi`
+//! * [Quad or Octo SPI](crate::xspi) Feature gate `xspi`
 //! * [Ethernet](crate::ethernet) Feature gate `ethernet`
 //! * [USB HS](crate::usb_hs) Feature gate `usb_hs`
 //!
@@ -166,12 +166,6 @@ pub mod pwm;
 pub mod pwr;
 #[cfg(feature = "device-selected")]
 pub mod qei;
-#[cfg(all(
-    feature = "device-selected",
-    feature = "quadspi",
-    not(feature = "rm0455")
-))]
-pub mod qspi;
 #[cfg(feature = "device-selected")]
 pub mod rcc;
 #[cfg(feature = "device-selected")]
@@ -196,3 +190,5 @@ pub mod timer;
 pub mod usb_hs;
 #[cfg(feature = "device-selected")]
 pub mod watchdog;
+#[cfg(all(feature = "device-selected", feature = "xspi"))]
+pub mod xspi;

src/prelude.rs

@@ -15,8 +15,6 @@ pub use crate::i2c::I2cExt as _stm32h7xx_hal_i2c_I2cExt;
 pub use crate::pwm::PwmAdvExt as _stm32_hal_pwm_PwmAdvExt;
 pub use crate::pwm::PwmExt as _stm32_hal_pwm_PwmExt;
 pub use crate::pwr::PwrExt as _stm32h7xx_hal_pwr_PwrExt;
-#[cfg(all(feature = "quadspi", not(feature = "rm0455")))]
-pub use crate::qspi::QspiExt as _stm32h7xx_hal_qspi_QspiExt;
 pub use crate::rcc::RccExt as _stm32h7xx_hal_rcc_RccExt;
 pub use crate::rng::RngCore as _stm32h7xx_hal_rng_RngCore;
 pub use crate::rng::RngExt as _stm32h7xx_hal_rng_RngExt;
@@ -27,3 +25,5 @@ pub use crate::serial::SerialExt as _stm32h7xx_hal_serial_SerialExt;
 pub use crate::spi::SpiExt as _stm32h7xx_hal_spi_SpiExt;
 pub use crate::time::U32Ext as _stm32h7xx_hal_time_U32Ext;
 pub use crate::timer::TimerExt as _stm32h7xx_hal_timer_TimerExt;
+#[cfg(all(feature = "xspi"))]
+pub use crate::xspi::XspiExt as _stm32h7xx_hal_xspi_XspiExt;