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Fix pr 90 (#93)
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* Update RL (#56)

* fix:remove hashvalue when popping graphs in push_back; refactor shrink

* fix: wrong error raising in graph buffer

* fix: do not shrink buffer according to sys mem usage

* fix: do not pop the graph to push

* fix: do not pop the graph to push

* feat: change mem control policy

* feat: change mem control policy

* Added two Rigetti ecc sets for experiment

* refactor: add some scripts

* fix scripts

* Added rigetti rotation merging circuits

* feat: add configs and scripts for rigetti set

* feat: add scripts for cx on t_tdg

* fix: gate set for t_tdg

* Added two gate types in cython

* fix: gate set for rigetti set

* feat: add scripts for tdg_rm

* fix:d script for tdg_rm

* fix:change name for tdg_rm

* fix: configs for tuning tdg

* feat: add scripts for darawing full seq

* feat: add scripts for darawing full seq

* fix: scripts

* Added rigetti 3, 6 ecc set

* fix: nam scripts and actor.py

* Added some rigetti circuits, a qasm converter, and modified the graph.from_qasm api

* Remove debug outputs

* minor changes

* feat: add test_rigetti

* fix: test_rigetti

* feat: add test tdg rm cx

* Fixed bug in graph::from_qasm

* Fixed some circuits

* Delete some rigetti benchmarks

* Added a rigetti 3, 3, 5 ecc set

* feat: run new rigetti circs

* update ipynb, including vis_seq

* fix: wrong circ dir in test_t_tdg_rm_cx.py

* Modified tasograph.cpp

* Added 4 gates ry1, ry3, rxx1, rxx3

* Add a ionq ecc set

* Added ionq circs, normalized

* feat: add BFS scripts for ionq

* feat: add RL config for IonQ

* feat: add RL config for IonQ

* feat: add RL config for IonQ

* Fixed a bug in Graph::from_qasm_file

* fix: increase num_gate_types

* New version of toffoli flip

* Added 6 nam benchmark circuits

* fix: set num_gate_types for Nam and TDG

* add ipynb to parse log

* feat: output best graph to a specified folder; close #54

Co-authored-by: zikun-li <[email protected]>

* Add CP (controlled phase) gate

* Add support of comment line and empty line to Graph::from_qasm_file

* [qasm] Also ignore barrier and measure

* [gate] Add is_sparse for sparse matrices

* [Refactor] Rename "DAG" to "CircuitSeq" (#61)

* [Refactor] Rename "DAG" to "CircuitSeq"

* fix compilation error

* [QASM] Support multiple quantum registers (#63)

* [qasm] Add CircuitSeq::from_qasm_file() (#64)

* [qasm] Add one kind of parameter format support in QASM parser (#65)

* [qasm] Store input parameters in the context

* [qasm] Add support of U gate

* [gate] Add some support functions for controlled gates (#67)

* Add HiGHS solver as a submodule (#70)

* fix: update isort in pre-commit to resolve its issue with newer python

* fix: wrong branch name

* [gate] Add CU1 gate (#75)

* Update Simulation (#77)

* Add MQT benchmarks and code skeleton for test_simulation

* Use Graph::from_qasm_file

* Add support of comment line and empty line to Graph::from_qasm_file

* [qasm] Also ignore barrier and measure

* Use dj benchmark

* Add MQT benchmarks

* [gate] Add is_sparse for sparse matrices

(cherry picked from commit 8a29479)

* Heuristics in SnuQS

* Experiment for 40-42q, 12-33k, 9 circuits

* Experiment for 40-42q, 12-33k, 9 circuits

* [refactor] Rename "DAG" to "CircuitSeq" in test_simulation.cpp

* Add ILP

* ILP for the full benchmark

* Fix example k value

* Fix dependencies

* Add some outputs

* Fix redundant dependencies

* Print out schedules

* Use HiGHS solver

* Add tiebreaker for heuristics and output the number of iterations (number of shuffles plus one)

* Use CircuitSeq::from_qasm_file in test_simulation

* Add 3 more benchmark circuits

* Multiple qregs for ILP

* restore k

* Remove initial default configuration in heuristics in test_simulation

* [qasm] Add support of U gate

* Update experiments for test_simulation.cpp and ilp.py

* [Simulation] Add schedule and a function to compute the number of down sets

* Test computing the number of down sets

* debug

* [Simulation] Dynamic programming to compute the kernel schedule

* [simulation] Add an optimization to the DP

* [simulation] Fix a bug in the DP

* [simulation] Add absorbing qubits to the DP

* Add 29-qubit circuits and fix absorbing qubits to be sets of sets

* Add 29-qubit circuits

* Not record the result kernels when not needed

* Integrate sim (#68)

* [simulator] initial attempt to integrate into qartz

* [simulator] fix compilation error, cmake version at least 3.18

* [simulator] set using simulator to be optional

* [simulator] set using simulator optional

* [simulator] do matrix shuffle to guarantee the matrix is for increasing qubit order

* [simulator] matrix shuffle

* [simulator] virtual/physical qubit mapping when applying gates

* [simulator] fix some bugs, tested on one device

* [simulator] fix some bugs, tested on 2-devices

* pre-commit

* [Simulation] Use pybind11 to integrate ILP into the simulator (#69)

* [Simulation] Use pybind11 to integrate ILP into the simulator

* Add pybind11 in requirements.txt

* Add pybind11 to env.yml

* Fix linker error on Linux

* Make pybind.cpp not dependent on the working directory

* Restore circuit location in test_simulation.cpp

* Fix the environment on Windows

* [simulation] Add the s array to ILP and print the running time in test_simulation (#71)

* [simulation] Fix a bug about ILP and DP (#72)

* [bug] Amend #72

* Fix Windows environment (#74)

* Fix Windows environment

* Code format

* Code format

* Code format

* [gate] Add CU1 gate

* implement a distributed simulator using legion

* Multi-node Simulator (mpi-based) (#76)

* [simulator] init multi-node impl

* [simulator][multi-node] fix some compilation error

* [simulator][multi-node] fix some error

* [simulator][multi-node] tested on 2 p3.2xlarge node

* [simulator][multi-node] added profiling, ILP some error

* [simulator][multi-node] fix some resource handle error

* [simulator][multi-node] for parallelcluster

* [simulator][multi-node] add more circuits

* [simulator][multi-node] do not block creating event

* [simulator][multi-node]fix sume bugs

* add some circuits

* pre-commit

* comment back quartz tests

---------

Co-authored-by: Ubuntu <[email protected]>

---------

Co-authored-by: shiyi.c_98 <[email protected]>
Co-authored-by: Zhihao Jia <[email protected]>
Co-authored-by: Ubuntu <[email protected]>

* Update Simulation (#81)

* Add MQT benchmarks and code skeleton for test_simulation

* Use Graph::from_qasm_file

* Add support of comment line and empty line to Graph::from_qasm_file

* [qasm] Also ignore barrier and measure

* Use dj benchmark

* Add MQT benchmarks

* [gate] Add is_sparse for sparse matrices

(cherry picked from commit 8a29479)

* Heuristics in SnuQS

* Experiment for 40-42q, 12-33k, 9 circuits

* Experiment for 40-42q, 12-33k, 9 circuits

* [refactor] Rename "DAG" to "CircuitSeq" in test_simulation.cpp

* Add ILP

* ILP for the full benchmark

* Fix example k value

* Fix dependencies

* Add some outputs

* Fix redundant dependencies

* Print out schedules

* Use HiGHS solver

* Add tiebreaker for heuristics and output the number of iterations (number of shuffles plus one)

* Use CircuitSeq::from_qasm_file in test_simulation

* Add 3 more benchmark circuits

* Multiple qregs for ILP

* restore k

* Remove initial default configuration in heuristics in test_simulation

* [qasm] Add support of U gate

* Update experiments for test_simulation.cpp and ilp.py

* [Simulation] Add schedule and a function to compute the number of down sets

* Test computing the number of down sets

* debug

* [Simulation] Dynamic programming to compute the kernel schedule

* [simulation] Add an optimization to the DP

* [simulation] Fix a bug in the DP

* [simulation] Add absorbing qubits to the DP

* Add 29-qubit circuits and fix absorbing qubits to be sets of sets

* Add 29-qubit circuits

* Not record the result kernels when not needed

* Integrate sim (#68)

* [simulator] initial attempt to integrate into qartz

* [simulator] fix compilation error, cmake version at least 3.18

* [simulator] set using simulator to be optional

* [simulator] set using simulator optional

* [simulator] do matrix shuffle to guarantee the matrix is for increasing qubit order

* [simulator] matrix shuffle

* [simulator] virtual/physical qubit mapping when applying gates

* [simulator] fix some bugs, tested on one device

* [simulator] fix some bugs, tested on 2-devices

* pre-commit

* [Simulation] Use pybind11 to integrate ILP into the simulator (#69)

* [Simulation] Use pybind11 to integrate ILP into the simulator

* Add pybind11 in requirements.txt

* Add pybind11 to env.yml

* Fix linker error on Linux

* Make pybind.cpp not dependent on the working directory

* Restore circuit location in test_simulation.cpp

* Fix the environment on Windows

* [simulation] Add the s array to ILP and print the running time in test_simulation (#71)

* [simulation] Fix a bug about ILP and DP (#72)

* [bug] Amend #72

* Fix Windows environment (#74)

* Fix Windows environment

* Code format

* Code format

* Code format

* [gate] Add CU1 gate

* implement a distributed simulator using legion

* Multi-node Simulator (mpi-based) (#76)

* [simulator] init multi-node impl

* [simulator][multi-node] fix some compilation error

* [simulator][multi-node] fix some error

* [simulator][multi-node] tested on 2 p3.2xlarge node

* [simulator][multi-node] added profiling, ILP some error

* [simulator][multi-node] fix some resource handle error

* [simulator][multi-node] for parallelcluster

* [simulator][multi-node] add more circuits

* [simulator][multi-node] do not block creating event

* [simulator][multi-node]fix sume bugs

* add some circuits

* pre-commit

* comment back quartz tests

---------

Co-authored-by: Ubuntu <[email protected]>

* [Simulation] Add an option to not consider single-qubit gates in DP (#78)

* [Simulation] DP for shared-memory gates (#80)

* Add Kernel and KernelCost classes

* Schedule::compute_end_schedule() now considers shared-memory kernels

* Include kernel type in Kernel::to_string()

* Fix missing single-qubit gates

* DP for shared-memory kernels

* Remove TODO about controlled gates

* Code format

---------

Co-authored-by: shiyi.c_98 <[email protected]>
Co-authored-by: Zhihao Jia <[email protected]>
Co-authored-by: Ubuntu <[email protected]>

* [simulation] Fix CX in execution schedules when the target is global (#82)

* [simulation] Fix CX being put into execution schedule when the target is global

* refine criteria

* edit comment

* [bug] Fix clone_from() copying hash value incorrectly (#84)

* [simulation] Restrict the Swap gate as local-only (#85)

* [simulation] Consider cacheline qubits in DP for shared-memory kernels (#83)

* Change the type of Schedule::local_qubit_ from vector<bool> to vector<int>

* [simulation] Consider cacheline qubits in DP for shared-memory kernels

* Apply the new algorithm and fix compilation error in debug mode

* Record global qubits

* Ecc pruning dev (#86)

* Add a pass to eliminate ecc classes that are equivalent under qubit permutation

* Add a pass to eliminate ecc classes that are equivalent under qubit permutation

* Modified kNumOptimizationsToPerform

* fix u3 matrix implementation (#87)

* Fix bug

* Eliminate u3 gate if parameters are all 0

* fix: pre-commit

---------

Co-authored-by: zikun-li <[email protected]>
Co-authored-by: xumingkuan <[email protected]>
Co-authored-by: shiyi.c_98 <[email protected]>
Co-authored-by: Zhihao Jia <[email protected]>
Co-authored-by: Ubuntu <[email protected]>
Co-authored-by: zikun-li <[email protected]>
Co-authored-by: Shaohan Hu <[email protected]>
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8 people authored Mar 14, 2023
1 parent 3a36874 commit 48926e3
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2 changes: 1 addition & 1 deletion .github/workflows/pre-commit.yml
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ name: pre-commit
on:
pull_request:
push:
branches: [main]
branches: [master]

jobs:
pre-commit:
Expand Down
6 changes: 6 additions & 0 deletions .gitmodules
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
[submodule "external/HiGHS"]
path = external/HiGHS
url = https://github.com/ERGO-Code/HiGHS.git
[submodule "external/legion"]
path = external/legion
url = https://gitlab.com/StanfordLegion/legion.git
2 changes: 1 addition & 1 deletion .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ repos:
'types_or': [c++, c, cuda]

- repo: https://github.com/pycqa/isort
rev: 5.10.1
rev: 5.12.0
hooks:
- id: isort
name: isort (python)
Expand Down
33 changes: 32 additions & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,33 @@ project(Quartz)

SET(CMAKE_BUILD_TYPE "Release")

# python
if (MSVC)
# Could not find the "Development" component on Windows. Using the following commands
# to get Python_INCLUDE_DIRS and Python_LIBRARY_DIRS.
find_package(Python COMPONENTS Interpreter)
execute_process(COMMAND ${Python_EXECUTABLE} -c "import sysconfig; print(sysconfig.get_path('include'))"
OUTPUT_VARIABLE Python_INCLUDE_DIRS OUTPUT_STRIP_TRAILING_WHITESPACE)
execute_process(COMMAND ${Python_EXECUTABLE} -c "import distutils.command.build_ext;
d = distutils.core.Distribution();
b = distutils.command.build_ext.build_ext(d);
b.finalize_options();
print(*b.library_dirs, sep=';')"
OUTPUT_VARIABLE Python_LIBRARY_DIRS OUTPUT_STRIP_TRAILING_WHITESPACE)
else()
find_package(Python COMPONENTS Interpreter Development)
endif()
message(STATUS "Python include directories: ${Python_INCLUDE_DIRS}")
include_directories(${Python_INCLUDE_DIRS})
message(STATUS "Python library directories: ${Python_LIBRARY_DIRS}")
link_directories(${Python_LIBRARY_DIRS})

# pybind11
execute_process(COMMAND ${Python_EXECUTABLE} -m pybind11 --cmake
OUTPUT_VARIABLE pybind11_DIR OUTPUT_STRIP_TRAILING_WHITESPACE)
find_package(pybind11 CONFIG REQUIRED)
include_directories(${pybind11_INCLUDE_DIR})

if (EXISTS ${CMAKE_CURRENT_BINARY_DIR}/config.cmake)
include (${CMAKE_CURRENT_BINARY_DIR}/config.cmake)
else()
Expand Down Expand Up @@ -32,7 +59,7 @@ include_directories("src/quartz/")

#initial variables
set(QUARTZ_LIBS "")
set(QUARTZ_LINK_LIBS ${CMAKE_DL_LIBS})
set(QUARTZ_LINK_LIBS ${CMAKE_DL_LIBS} pybind11::embed)
set(CMAKE_EXPORT_COMPILE_COMMANDS ON)

file(GLOB_RECURSE QUARTZ_SRCS
Expand Down Expand Up @@ -111,3 +138,7 @@ install (DIRECTORY ${PROJECT_SOURCE_DIR}/src/quartz/

add_subdirectory(src/test)
add_subdirectory(src/benchmark)

if(QUARTZ_USE_SIMULATOR)
add_subdirectory(src/sim)
endif()
32 changes: 16 additions & 16 deletions CODE_STRUCTURE.md
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Expand Up @@ -21,44 +21,44 @@ In `src/quartz/context/rule_parser.h`
* `class RuleParser`: define the rules to write 3-qubit gates in each of the gate sets

In `src/quartz/parser/qasm_parser.h`
* `class QASMParser`: parse an input QASM file to Quartz's DAG representation
* `class QASMParser`: parse an input QASM file to Quartz's CircuitSeq representation

In `src/dag/dag.h`
* `class DAG`: a circuit represented in a DAG with all gates stored in an `std::vector` (which is a sequence representation)
In `src/quartz/circuitseq/circuitseq.h`
* `class CircuitSeq`: a circuit sequence with all gates stored in an `std::vector`

In `src/dag/dagnode.h`
* `class DAGNode`: a node in DAG corresponds to a wire in the circuit
In `src/quartz/circuitseq/circuitwire.h`
* `class CircuitWire`: a wire in the circuit sequence

In `src/dag/daghyperedge.h`
* `class DAGHyperEdge`: a hyperedge in DAG corresponds to a gate (or parameter expression) in the circuit
In `src/quartz/circuitseq/circuitgate.h`
* `class CircuitGate`: a gate (or parameter expression) in the circuit sequence

In `src/dataset/dataset.h`
In `src/quartz/dataset/dataset.h`
* `class Dataset`: a collection of circuits grouped by fingerprints

In `src/dataset/equivalence_set.h`
In `src/quartz/dataset/equivalence_set.h`
* `class EquivalenceClass`: an ECC
* `class EquivalenceSet`: an ECC set

In `src/generator/generator.h`
In `src/quartz/generator/generator.h`
* `class Generator`: the circuit generator
* `Generator::generate`: generate circuits for an unverified ECC set (then use `src/python/verify_equivalences.py` to get the ECC set)

In `src/math/matrix.h`
In `src/quartz/math/matrix.h`
* `class Matrix`: a complex square matrix

In `src/math/vector.h`
In `src/quartz/math/vector.h`
* `class Vector`: a complex vector

In `src/verifier/verifier.h`
In `src/quartz/verifier/verifier.h`
* `Verifier::redundant`: check if the circuit generated is redundant, i.e., having some slices not in the representative set

In `src/tasograph/tasograph.h`
In `src/quartz/tasograph/tasograph.h`
* `class Graph`: the circuit to be optimized
* `Graph::optimize`: use the search algorithm to optimize the circuit
* `Graph::context_shift`: shift the context of the circuit, e.g., changing the gate set

In `src/tasograph/substitution.h`
In `src/quartz/tasograph/substitution.h`
* `class GraphXfer`: a circuit transformation

In `src/test/gen_ecc_set.cpp`
In `src/quartz/test/gen_ecc_set.cpp`
* `gen_ecc_set`: a function to generate ECC sets with given gate set and hyperparameters
14 changes: 14 additions & 0 deletions INSTALL.md
Original file line number Diff line number Diff line change
Expand Up @@ -59,3 +59,17 @@ export LD_LIBRARY_PATH=/your/path/:$LD_LIBRARY_PATH
```

to `~/.bashrc`.

### Dependencies for the simulator

For the simulator, you need to install the HiGHS solver.

```shell
cd external/HiGHS
mkdir build
cd build
cmake ..
make
```

Then add `/your/path/to/quartz/external/HiGHS/build/bin` to `PATH`.
12 changes: 6 additions & 6 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -70,26 +70,26 @@ After that, you need a `QASMParser` object to parse the input `qasm` file. You c
QASMParser qasm_parser(&src_ctx);
```
Now you can use the `QASMParser` object to load the circuit from the `qasm` file to a `DAG` object, as below:
Now you can use the `QASMParser` object to load the circuit from the `qasm` file to a `CircuitSeq` object, as below:
``` cpp
DAG *dag = nullptr;
if (!qasm_parser.load_qasm(input_fn, dag)) {
CircuitSeq *seq = nullptr;
if (!qasm_parser.load_qasm(input_fn, seq)) {
std::cout << "Parser failed" << std::endl;
}
```

After you have the circuit loaded into the `DAG` object, you can construct a `Graph` object from it. The `Graph` object is the final circuit representation used in our optimizer. You can construct it as below:
After you have the circuit loaded into the `CircuitSeq` object, you can construct a `Graph` object from it. The `Graph` object is the final circuit representation used in our optimizer. You can construct it as below:

``` cpp
Graph graph(&src_ctx, dag);
Graph graph(&src_ctx, seq);
```
#### Context shift
If the input gate set is different from your target gate set, you should consider using the `context_shift` APIs to shift the context constructed with the gate sets to a context constructed with the target gate set.
To shift the context, you should create three `Contxt` objects, one for input, one for target, and one for their union as below:
To shift the context, you should create three `Context` objects, one for input, one for target, and one for their union as below:
``` cpp
Context src_ctx({GateType::h, GateType::ccz, GateType::x, GateType::cx,
Expand Down
66 changes: 66 additions & 0 deletions circuit/MQTBench_28q/ghz_indep_qiskit_28.qasm
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
// Benchmark was created by MQT Bench on 2022-12-15
// For more information about MQT Bench, please visit https://www.cda.cit.tum.de/mqtbench/
// MQT Bench version: 0.2.2
// Qiskit version: {'qiskit-terra': '0.22.3', 'qiskit-aer': '0.11.1', 'qiskit-ignis': '0.7.0', 'qiskit-ibmq-provider': '0.19.2', 'qiskit': '0.39.3', 'qiskit-nature': '0.5.1', 'qiskit-finance': '0.3.4', 'qiskit-optimization': '0.4.0', 'qiskit-machine-learning': '0.5.0'}

OPENQASM 2.0;
include "qelib1.inc";
qreg q[28];
creg meas[28];
h q[27];
cx q[27],q[26];
cx q[26],q[25];
cx q[25],q[24];
cx q[24],q[23];
cx q[23],q[22];
cx q[22],q[21];
cx q[21],q[20];
cx q[20],q[19];
cx q[19],q[18];
cx q[18],q[17];
cx q[17],q[16];
cx q[16],q[15];
cx q[15],q[14];
cx q[14],q[13];
cx q[13],q[12];
cx q[12],q[11];
cx q[11],q[10];
cx q[10],q[9];
cx q[9],q[8];
cx q[8],q[7];
cx q[7],q[6];
cx q[6],q[5];
cx q[5],q[4];
cx q[4],q[3];
cx q[3],q[2];
cx q[2],q[1];
cx q[1],q[0];
barrier q[0],q[1],q[2],q[3],q[4],q[5],q[6],q[7],q[8],q[9],q[10],q[11],q[12],q[13],q[14],q[15],q[16],q[17],q[18],q[19],q[20],q[21],q[22],q[23],q[24],q[25],q[26],q[27];
measure q[0] -> meas[0];
measure q[1] -> meas[1];
measure q[2] -> meas[2];
measure q[3] -> meas[3];
measure q[4] -> meas[4];
measure q[5] -> meas[5];
measure q[6] -> meas[6];
measure q[7] -> meas[7];
measure q[8] -> meas[8];
measure q[9] -> meas[9];
measure q[10] -> meas[10];
measure q[11] -> meas[11];
measure q[12] -> meas[12];
measure q[13] -> meas[13];
measure q[14] -> meas[14];
measure q[15] -> meas[15];
measure q[16] -> meas[16];
measure q[17] -> meas[17];
measure q[18] -> meas[18];
measure q[19] -> meas[19];
measure q[20] -> meas[20];
measure q[21] -> meas[21];
measure q[22] -> meas[22];
measure q[23] -> meas[23];
measure q[24] -> meas[24];
measure q[25] -> meas[25];
measure q[26] -> meas[26];
measure q[27] -> meas[27];
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