[hardware] 🐛Fix vasub&vasubu error in simd_alu. #378
+24
−20
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This PR addresses a bug in the simd_alu module that caused incorrect results for the vssub instruction. The issue was identified and corrected, ensuring the instructions now produce accurate results.
Changelog
Fixed
Fix vssub error in simd_alu.
Testing
Simulated apps/riscv-tests/isa/rv64uv/vssub PASS using verilator and vcs.