Enable dGPU for decoder and encoder #131
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1\ Enable ONEVPL_EXPERIMENTAL for init dGPU session and get deviceId 2\ According to device id to judge if it is dGPU or iGPU 3\ dGPU deviceid range: 0x5600 < deviceId < 0x56B3 4\ After initializing dGPU, reset RateControl for dGPU. 5\ Set buffer Tile4 for dGPU and Y-Tile for iGPU Tracked-On: OAM-112744 Signed-off-by: Shaofeng Tang <[email protected]>
TianmiChen
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Nov 28, 2023
sysopenci
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PR integrated into 'preintegration' builder
More details, logs, and binaries: /absp/builders/celadon_smr0_master-preintegration/builds/1104
Done by "Tang, Shaofeng" [email protected]
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PR integrated into 'premerge' builder
More details, logs, and binaries: /absp/builders/celadon_smr0_master-premerge/builds/595
Done by "Tang, Shaofeng" [email protected]
sysopenci
merged commit fb1565b
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projectceladon:celadon/s/mr0/master
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cactus finished building and testing your changes
It was requested for merge by [email protected]
so we merge it. Thanks for your contribution.
more details, logs, and binaries: /absp/builders/celadon_smr0_master-mergerequest/builds/614
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1\ Enable ONEVPL_EXPERIMENTAL for init dGPU session and get deviceId 2\ According to device id to judge if it is dGPU or iGPU 3\ dGPU deviceid range: 0x5600 < deviceId < 0x56B3 4\ After initializing dGPU, reset RateControl for dGPU. 5\ Set buffer Tile4 for dGPU and Y-Tile for iGPU
Tracked-On: OAM-112744