Firmware revision 8 (patch 1)

Prevent watchdog from starting on the first (ignored) rising edge on input
Ensure 50us high level on AUX for bootloader full-duplex mode
GD32F350 fix temperature sensor values according to datasheet

boot/src/io.c

@@ -31,8 +31,17 @@
 
 void initio(void) {
 #ifdef IO_PA2
+	TIM14_ARR = CLK_CNT(20000) - 1;
+	TIM14_EGR = TIM_EGR_UG;
+	TIM14_CR1 = TIM_CR1_CEN;
+	TIM14_SR = ~TIM_SR_UIF;
 	USART2_BRR = CLK_CNT(38400);
-	if (!(GPIOA_IDR & 0x8000)) USART2_CR3 = USART_CR3_HDSEL; // A15 low
+	while (!(TIM14_SR & TIM_SR_UIF)) { // Wait for 50us high level on AUX
+		if (!(GPIOA_IDR & 0x8000)) { // A15 low
+			USART2_CR3 = USART_CR3_HDSEL;
+			break;
+		}
+	}
 	USART2_CR1 = USART_CR1_UE | USART_CR1_TE | USART_CR1_RE;
 #else
 	TIM3_SMCR = TIM_SMCR_SMS_RM | TIM_SMCR_TS_TI1F_ED; // Reset on any edge on TI1
@@ -43,9 +52,8 @@ void initio(void) {
 	TIM3_EGR = TIM_EGR_UG;
 	TIM3_CR1 = TIM_CR1_CEN;
 #endif
-	TIM14_PSC = CLK / 10000 - 1; // 0.1ms resolution
+	TIM14_PSC = CLK_CNT(10000) - 1; // 0.1ms resolution
 	TIM14_ARR = 4999; // 500ms I/O timeout
-	TIM14_CR1 = TIM_CR1_URS;
 	TIM14_EGR = TIM_EGR_UG;
 	TIM14_CR1 = TIM_CR1_CEN | TIM_CR1_URS;
 }

mcu/GD32F350/config.c

@@ -192,6 +192,6 @@ void dma1_channel1_isr(void) {
 #endif
 	if (ain) x = buf[i++];
 	int r = 4914000 / buf[i + 1];
-	int t = (1450 - (buf[i] * r >> 12)) * 10 / 43 + 25;
+	int t = (1440 - (buf[i] * r >> 12)) * 100 / 408 + 25;
 	adc_data(t, v * r >> 12, c * r >> 12, x * r >> 12);
 }

src/io.c

@@ -98,6 +98,8 @@ static void entryirq(void) {
 		analog = 1;
 		return;
 	}
+	int t = TIM_CCR1(IOTIM); // Time between two rising edges
+	if (!n++) return; // First capture is always invalid
 	IWDG_KR = IWDG_KR_START;
 #ifdef IO_PA2
 	if (cfg.input_mode >= 2) {
@@ -128,8 +130,6 @@ static void entryirq(void) {
 		return;
 	}
 #endif
-	int t = TIM_CCR1(IOTIM); // Time between two rising edges
-	if (!n++) return; // First capture is always invalid
 	if (TIM_PSC(IOTIM)) {
 		if (t > 2000) { // Servo/Oneshot125
 			ioirq = calibirq;