[ci] Add basic regression test to PRs

.github/workflows/test.yml

@@ -0,0 +1,32 @@
+name: Run Regression Tests
+
+on:
+  workflow_dispatch:
+  pull_request:
+
+jobs:
+  regressions:
+    runs-on: ubuntu-latest
+    steps:
+
+      - name: Check out Repository
+        uses: actions/checkout@v3
+
+      - name: Check out Test Docs Repository
+        uses: actions/checkout@v3
+        with:
+          repository: modm-ext/modm-data-test-docs
+          path: ext/test/regression
+
+      - name: Setup Python 3.12
+        uses: actions/setup-python@v4
+        with:
+          python-version: "3.12"
+
+      - name: Install Python Dependencies
+        run: |
+          pip3 install .
+
+      - name: Run Regression Tests
+        run: |
+          make run-regression-tests

test/convert_html.sh

@@ -1,58 +1,55 @@
-python3 tools/scripts/pdf2html.py --html --page 170 \
-	--document ext/cache/stmicro-pdf/DS10693-v10.pdf --output test/data/html/DS10693-v10.html &
+python3 -m modm_data.pdf2html.stmicro --html --range 21:23 \
+	--document ext/test/regression/stmicro/DS10329-v4.pdf --output test/data/html/stmicro/DS10329-v4.html &
 
-python3 tools/scripts/pdf2html.py --html --range 21:23 \
-	--document ext/cache/stmicro-pdf/DS10329-v4.pdf --output test/data/html/DS10329-v4.html &
-
-python3 tools/scripts/pdf2html.py --html --range 88:90 \
-	--document ext/cache/stmicro-pdf/DS12117-v7.pdf --output test/data/html/DS12117-v7.html &
-
-# Broken table header line, with partial boldness, double header line
-python3 tools/scripts/pdf2html.py --html --range 638:641 --page 1143 --range 3055:3058 \
-	--document ext/cache/stmicro-pdf/RM0399-v3.pdf --output test/data/html/RM0399-v3.html &
-
-# Broken table header line partial boldness
-python3 tools/scripts/pdf2html.py --html --range 433:434 \
-	--document ext/cache/stmicro-pdf/RM0456-v2.pdf --output test/data/html/RM0456-v2.html &
-
-# Broken table header line partial boldness >50%
-python3 tools/scripts/pdf2html.py --html --page 893 \
-	--document ext/cache/stmicro-pdf/RM0313-v6.pdf --output test/data/html/RM0313-v6.html &
+python3 -m modm_data.pdf2html.stmicro --html --page 170 \
+	--document ext/test/regression/stmicro/DS10693-v10.pdf --output test/data/html/stmicro/DS10693-v10.html &
 
 # Double header line
-python3 tools/scripts/pdf2html.py --html --range 51:52 \
-	--document ext/cache/stmicro-pdf/DS11250-v4.pdf --output test/data/html/DS11250-v4.html &
+python3 -m modm_data.pdf2html.stmicro --html --range 51:52 \
+	--document ext/test/regression/stmicro/DS11250-v4.pdf --output test/data/html/stmicro/DS11250-v4.html &
+
+python3 -m modm_data.pdf2html.stmicro --html --range 88:90 \
+	--document ext/test/regression/stmicro/DS12117-v7.pdf --output test/data/html/stmicro/DS12117-v7.html &
 
 # Double header line
-python3 tools/scripts/pdf2html.py --html --page 114 \
-	--document ext/cache/stmicro-pdf/DS12556-v6.pdf --output test/data/html/DS12556-v6.html &
+python3 -m modm_data.pdf2html.stmicro --html --page 114 \
+	--document ext/test/regression/stmicro/DS12556-v6.pdf --output test/data/html/stmicro/DS12556-v6.html &
 
 # Header cells with line but <30% bold
-python3 tools/scripts/pdf2html.py --html --range 91:92 \
-	--document ext/cache/stmicro-pdf/DS12930-v1.pdf --output test/data/html/DS12930-v1.html &
+python3 -m modm_data.pdf2html.stmicro --html --range 91:92 \
+	--document ext/test/regression/stmicro/DS12930-v1.pdf --output test/data/html/stmicro/DS12930-v1.html &
 
-# Multiple thick lines and repeated headers without correct pagination
-python3 tools/scripts/pdf2html.py --html --range 90:93 \
-	--document ext/cache/stmicro-pdf/RM0090-v19pdf --output test/data/html/RM0090-v19.html &
 
-# Header cells without line and >50% bold
-python3 tools/scripts/pdf2html.py --html --range 1354:1355 \
-	--document ext/cache/stmicro-pdf/RM0453-v2.pdf --output test/data/html/RM0453-v2.html &
+# Multiple thick lines and repeated headers without correct pagination
+python3 -m modm_data.pdf2html.stmicro --html --range 90:93 \
+	--document ext/test/regression/stmicro/RM0090-v19.pdf --output test/data/html/stmicro/RM0090-v19.html &
 
-# Header cells without line and >50% bold
-python3 tools/scripts/pdf2html.py --html --range 3005:3006 \
-	--document ext/cache/stmicro-pdf/RM0456-v2.pdf --output test/data/html/RM0456-v2.html &
+# Broken table header line partial boldness >50%
+python3 -m modm_data.pdf2html.stmicro --html --page 893 \
+	--document ext/test/regression/stmicro/RM0313-v6.pdf --output test/data/html/stmicro/RM0313-v6.html &
 
 # Table bottom line is out of template
-python3 tools/scripts/pdf2html.py --html --range 773:773 \
-	--document ext/cache/stmicro-pdf/RM0360-v4.pdf --output test/data/html/RM0360-v4.html &
+python3 -m modm_data.pdf2html.stmicro --html --range 773:773 \
+	--document ext/test/regression/stmicro/RM0360-v4.pdf --output test/data/html/stmicro/RM0360-v4.html &
 
 # Heading 4 does not get recognized
-python3 tools/scripts/pdf2html.py --html --range 180:180 \
-	--document ext/cache/stmicro-pdf/RM0367-v8.pdf --output test/data/html/RM0367-v8.html &
+python3 -m modm_data.pdf2html.stmicro --html --range 180:180 \
+	--document ext/test/regression/stmicro/RM0367-v8.pdf --output test/data/html/stmicro/RM0367-v8.html &
+
+# Broken table header line, with partial boldness, double header line
+python3 -m modm_data.pdf2html.stmicro --html --range 638:641 --page 1143 --range 3055:3058 \
+	--document ext/test/regression/stmicro/RM0399-v3.pdf --output test/data/html/stmicro/RM0399-v3.html &
+
+python3 -m modm_data.pdf2html.stmicro --html --range 265:265 \
+	--document ext/test/regression/stmicro/RM0434-v9.pdf --output test/data/html/stmicro/RM0434-v9.html &
+
+# Header cells without line and >50% bold
+python3 -m modm_data.pdf2html.stmicro --html --range 1354:1355 \
+	--document ext/test/regression/stmicro/RM0453-v2.pdf --output test/data/html/stmicro/RM0453-v2.html &
 
-python3 tools/scripts/pdf2html.py --html --range 265:265 \
-	--document ext/cache/stmicro-pdf/RM0434-v9.pdf --output test/data/html/RM0434-v9.html &
+# Broken table header line partial boldness, Header cells without line and >50% bold
+python3 -m modm_data.pdf2html.stmicro --html --range 433:434 --range 3005:3006 \
+	--document ext/test/regression/stmicro/RM0456-v2.pdf --output test/data/html/stmicro/RM0456-v2.html &
 
 wait
 

test/data/html/DS11250-v4.html → test/data/html/stmicro/DS11250-v4.html

@@ -192,11 +192,7 @@
     <p>
       <b>Timing reference: 0.2 Vs - 0.8 Vs (Vs = V<sub>VDDD</sub>-D<sub>GND</sub>)</b>
     </p>
-    <p>Explanation:</p>
-    <ol>
-      <li value="c">Q: SCK stable (low or high) before CS falling</li>
-      <li value="d">P: SCK stable (low or high) after CS rising</li>
-    </ol>
+    <p>Explanation:<ol><li value="c">Q: SCK stable (low or high) before CS falling</li><li value="d">P: SCK stable (low or high) after CS rising</li></ol></p>
     <h3 id="section5.4">5.4 Error management</h3>
     <p>The device replies with an error response if one of the following errors has occurred:</p>
     <table id="table50">

test/data/html/DS12930-v1.html → test/data/html/stmicro/DS12930-v1.html

@@ -9,43 +9,41 @@
         <b>Table 8. Port A alternate functions</b>
       </caption>
       <tr>
-        <td colspan="2" rowspan="2">
-          <b>Port</b>
-        </td>
-        <th class="thb">AF0</th>
-        <th class="thb">AF1</th>
-        <th class="thb">AF2</th>
-        <th class="thb">AF3</th>
-        <th class="thb">AF4</th>
-        <th class="thb">AF5</th>
-        <th class="thb">AF6</th>
-        <th class="thb">AF7</th>
-        <th class="thb">AF8</th>
-        <th class="thb">AF9</th>
-        <th class="thb">AF10</th>
-        <th class="thb">AF11</th>
-        <th class="thb">AF12</th>
-        <th class="thb">AF13</th>
-        <th class="thb">AF14</th>
-        <th class="thb">AF15</th>
+        <th colspan="2" rowspan="2" class="thb">Port</th>
+        <th>AF0</th>
+        <th>AF1</th>
+        <th>AF2</th>
+        <th>AF3</th>
+        <th>AF4</th>
+        <th>AF5</th>
+        <th>AF6</th>
+        <th>AF7</th>
+        <th>AF8</th>
+        <th>AF9</th>
+        <th>AF10</th>
+        <th>AF11</th>
+        <th>AF12</th>
+        <th>AF13</th>
+        <th>AF14</th>
+        <th>AF15</th>
       </tr>
       <tr>
-        <td>SYS</td>
-        <td>TIM1/2/16/1<br/>7/LPTIM1/<br/>HRTIM1</td>
-        <td>SAI1/TIM3/<br/>4/5/HRTIM<br/>1</td>
-        <td>LPUART/<br/>TIM8/LPTIM<br/>2/3/4/5/<br/>HRTIM1/<br/>DFSDM1</td>
-        <td>I2C1/2/3/4/U<br/>SART1/<br/>TIM15/<br/>LPTIM2/<br/>DFSDM1/CE<br/>C</td>
-        <td>SPI1/2/3/4/<br/>5/6/CEC</td>
-        <td>SPI2/3/SAI1<br/>/3/I2C4/<br/>UART4/<br/>DFSDM1</td>
-        <td>SPI2/3/6/<br/>USART1/2/<br/>3/6/UART7/<br/>SDMMC1</td>
-        <td>SPI6/SAI2/<br/>4/UART4/5/<br/>8/LPUART/<br/>SDMMC1/<br/>SPDIFRX1</td>
-        <td>SAI4/FDCA<br/>N1/FDACN<br/>2/TIM13/14<br/>/QUADSPI/<br/>FMC/SDM<br/>MC2/LCD/<br/>SPDIFRX1</td>
-        <td>SAI2/4/TIM<br/>8/QUADSPI<br/>/SDMMC2/<br/>OTG1_HS/<br/>OTG2_FS/<br/>LCD</td>
-        <td>I2C4/UART<br/>7/SWPMI1/<br/>TIM1/8/<br/>DFSDM1/<br/>SDMMC2/<br/>MDIOS/<br/>ETH</td>
-        <td>TIM1/8/FMC<br/>/SDMMC1/<br/>MDIOS/<br/>OTG1_FS/<br/>LCD</td>
-        <td>TIM1/DCMI/<br/>LCD/DSI/<br/>COMP</td>
-        <td>UART5/<br/>LCD</td>
-        <td>SYS</td>
+        <th class="thb">SYS</th>
+        <th class="thb">TIM1/2/16/1<br/>7/LPTIM1/<br/>HRTIM1</th>
+        <th class="thb">SAI1/TIM3/<br/>4/5/HRTIM<br/>1</th>
+        <th class="thb">LPUART/<br/>TIM8/LPTIM<br/>2/3/4/5/<br/>HRTIM1/<br/>DFSDM1</th>
+        <th class="thb">I2C1/2/3/4/U<br/>SART1/<br/>TIM15/<br/>LPTIM2/<br/>DFSDM1/CE<br/>C</th>
+        <th class="thb">SPI1/2/3/4/<br/>5/6/CEC</th>
+        <th class="thb">SPI2/3/SAI1<br/>/3/I2C4/<br/>UART4/<br/>DFSDM1</th>
+        <th class="thb">SPI2/3/6/<br/>USART1/2/<br/>3/6/UART7/<br/>SDMMC1</th>
+        <th class="thb">SPI6/SAI2/<br/>4/UART4/5/<br/>8/LPUART/<br/>SDMMC1/<br/>SPDIFRX1</th>
+        <th class="thb">SAI4/FDCA<br/>N1/FDACN<br/>2/TIM13/14<br/>/QUADSPI/<br/>FMC/SDM<br/>MC2/LCD/<br/>SPDIFRX1</th>
+        <th class="thb">SAI2/4/TIM<br/>8/QUADSPI<br/>/SDMMC2/<br/>OTG1_HS/<br/>OTG2_FS/<br/>LCD</th>
+        <th class="thb">I2C4/UART<br/>7/SWPMI1/<br/>TIM1/8/<br/>DFSDM1/<br/>SDMMC2/<br/>MDIOS/<br/>ETH</th>
+        <th class="thb">TIM1/8/FMC<br/>/SDMMC1/<br/>MDIOS/<br/>OTG1_FS/<br/>LCD</th>
+        <th class="thb">TIM1/DCMI/<br/>LCD/DSI/<br/>COMP</th>
+        <th class="thb">UART5/<br/>LCD</th>
+        <th class="thb">SYS</th>
       </tr>
       <tr>
         <td rowspan="13">