Refactor and combine STM32H7 linker scripts

connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp

@@ -27,10 +27,12 @@
 #include "netsocket/nsapi_types.h"
 #include "platform/mbed_power_mgmt.h"
 #include "platform/mbed_error.h"
+#include "CacheAlignedBuffer.h"
 
 #include "stm32xx_emac_config.h"
 #include "stm32xx_emac.h"
 
+
 #include "mbed-trace/mbed_trace.h"
 
 #if defined(ETH_IP_VERSION_V2)
@@ -59,6 +61,7 @@
 #include "lan8742/lan8742.h"
 #include "lwip/memp.h"
 #include "lwip/api.h"
+#include "linker_scripts/stm32_eth_region_size_calcs.h"
 #endif
 
 using namespace std::chrono;
@@ -75,46 +78,19 @@ using namespace std::chrono;
 #define STM_ETH_MTU_SIZE        1500
 #define STM_ETH_IF_NAME         "st"
 
-#ifndef ETH_IP_VERSION_V2
-
-#if defined (__ICCARM__)   /*!< IAR Compiler */
-#pragma data_alignment=4
-#endif
-__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx DMA Descriptor */
-
-#if defined (__ICCARM__)   /*!< IAR Compiler */
-#pragma data_alignment=4
-#endif
-__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
-
-#if defined (__ICCARM__)   /*!< IAR Compiler */
-#pragma data_alignment=4
-#endif
-__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
-
-#if defined (__ICCARM__)   /*!< IAR Compiler */
-#pragma data_alignment=4
-#endif
-__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
-
-#else // ETH_IP_VERSION_V2
-
-#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+#define ETH_RX_DESC_CNT MBED_CONF_STM32_EMAC_ETH_RXBUFNB
+#define ETH_TX_DESC_CNT MBED_CONF_STM32_EMAC_ETH_TXBUFNB
 
-#pragma location=0x30040000
-ETH_DMADescTypeDef  DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
-#pragma location=0x30040100
-ETH_DMADescTypeDef  DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
-#pragma location=0x30040400
-uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE]; /* Ethernet Receive Buffers */
+ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".EthDescriptors"))); /* Ethernet Rx DMA Descriptors */
+ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".EthDescriptors")));  /* Ethernet Tx DMA Descriptors */
 
-#elif defined ( __GNUC__ ) /* GCC & ARMC6*/
+// Rx buffer addresses need to be aligned 4 bytes and to cache lines because we cache invalidate the buffers after receiving them.
+mbed::StaticCacheAlignedBuffer<uint32_t, ETH_MAX_PACKET_SIZE / sizeof(uint32_t)> Rx_Buff[ETH_RX_DESC_CNT] __attribute__((section(".EthBuffers"))); /* Ethernet Receive Buffers */
 
-ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
-ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection")));   /* Ethernet Tx DMA Descriptors */
-uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE] __attribute__((section(".RxArraySection"))); /* Ethernet Receive Buffers */
+// Tx buffers just need to be aligned to the nearest 4 bytes.
+uint32_t Tx_Buff[ETH_TX_DESC_CNT][ETH_MAX_PACKET_SIZE / sizeof(uint32_t)] __attribute__((section(".EthBuffers")));
 
-#endif
+#if defined(ETH_IP_VERSION_V2)
 
 static lan8742_Object_t LAN8742;
 
@@ -206,6 +182,12 @@ bool _phy_is_up(int32_t phy_state)
     return phy_state > LAN8742_STATUS_LINK_DOWN;
 }
 
+// Integer log2 of an integer.
+// from https://stackoverflow.com/questions/994593/how-to-do-an-integer-log2-in-c
+static inline uint32_t log2i(uint32_t x) {
+    return sizeof(uint32_t) * 8 - __builtin_clz(x) - 1;
+}
+
 static void MPU_Config(void)
 {
     MPU_Region_InitTypeDef MPU_InitStruct;
@@ -214,34 +196,23 @@ static void MPU_Config(void)
     HAL_MPU_Disable();
 
     /* Configure the MPU attributes as Device not cacheable
-       for ETH DMA descriptors */
+       for ETH DMA descriptors.  The linker script puts these into their own
+       cordoned off, power-of-2 sized region. */
     MPU_InitStruct.Enable = MPU_REGION_ENABLE;
-    MPU_InitStruct.BaseAddress = 0x30040000;
-    MPU_InitStruct.Size = MPU_REGION_SIZE_1KB;
     MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
     MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
     MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
     MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = MPU_REGION_NUMBER0;
+    MPU_InitStruct.Number = 4; // Mbed OS MPU config can use regions 0 through 3
     MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
     MPU_InitStruct.SubRegionDisable = 0x00;
-    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 
-    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+    extern uint8_t __eth_descriptors_start[0]; // <-- defined in linker script
+    MPU_InitStruct.BaseAddress = reinterpret_cast<uint32_t>(__eth_descriptors_start);
 
-    /* Configure the MPU attributes as Cacheable write through
-       for LwIP RAM heap which contains the Tx buffers */
-    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
-    MPU_InitStruct.BaseAddress = 0x30044000;
-    MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;
-    MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
-    MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
-    MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
-    MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = MPU_REGION_NUMBER1;
-    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
-    MPU_InitStruct.SubRegionDisable = 0x00;
-    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+    // Use a logarithm to calculate the region size
+    MPU_InitStruct.Size = log2i(STM32_DMA_DESCRIP_REGION_SIZE) - 1;
 
     HAL_MPU_ConfigRegion(&MPU_InitStruct);
 
@@ -341,7 +312,7 @@ bool STM32_EMAC::low_level_init_successful()
     }
 
     /* Initialize Rx Descriptors list: Chain Mode  */
-    if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB) != HAL_OK) {
+    if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, Rx_Buff[0].data(), ETH_RXBUFNB) != HAL_OK) {
         tr_error("HAL_ETH_DMARxDescListInit issue");
         return false;
     }
@@ -399,7 +370,7 @@ bool STM32_EMAC::low_level_init_successful()
     TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 
     for (idx = 0; idx < ETH_RX_DESC_CNT; idx++) {
-        HAL_ETH_DescAssignMemory(&EthHandle, idx, Rx_Buff[idx], NULL);
+        HAL_ETH_DescAssignMemory(&EthHandle, idx, reinterpret_cast<uint8_t *>(Rx_Buff[idx].data()), NULL);
     }
 
     tr_info("low_level_init_successful");
@@ -534,6 +505,12 @@ bool STM32_EMAC::link_out(emac_mem_buf_t *buf)
             Txbuffer[i].next = NULL;
         }
 
+#if defined(__DCACHE_PRESENT)
+        // For chips with a cache, we need to evict the Tx data from cache to main memory.
+        // This ensures that the DMA controller can see the most up-to-date copy of the data.
+        SCB_CleanDCache_by_Addr(Txbuffer[i].buffer, Txbuffer[i].len);
+#endif
+
         i++;
     }
 
@@ -661,7 +638,7 @@ int STM32_EMAC::low_level_input(emac_mem_buf_t **buf)
         /* Build Rx descriptor to be ready for next data reception */
         HAL_ETH_BuildRxDescriptors(&EthHandle);
 
-#if !(defined(DUAL_CORE) && defined(CORE_CM4))
+#if defined(__DCACHE_PRESENT)
         /* Invalidate data cache for ETH Rx Buffers */
         SCB_InvalidateDCache_by_Addr((uint32_t *)RxBuff.buffer, frameLength);
 #endif

platform/mbed_lib.json

@@ -243,6 +243,9 @@
         "MTS_DRAGONFLY_L471QG": {
             "crash-capture-enabled": true,
             "fatal-error-auto-reboot-enabled": true
+        },
+        "MCU_STM32H7": {
+            "crash-capture-enabled": true
         }
     }
 }

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/CMakeLists.txt

@@ -5,10 +5,8 @@ add_subdirectory(TARGET_NUCLEO_H723ZG EXCLUDE_FROM_ALL)
 
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
     set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h723xx.S)
-    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h723xg.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
     set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h723xx.S)
-    set(LINKER_FILE TOOLCHAIN_ARM/stm32h723xg.sct)
 endif()
 
 add_library(mbed-stm32h723xg INTERFACE)
@@ -23,6 +21,4 @@ target_sources(mbed-stm32h723xg
         ${STARTUP_FILE}
 )
 
-mbed_set_linker_script(mbed-stm32h723xg ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
-
 target_link_libraries(mbed-stm32h723xg INTERFACE mbed-stm32h7)

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/CMakeLists.txt

@@ -5,10 +5,8 @@ add_subdirectory(TARGET_WIO_H725AE EXCLUDE_FROM_ALL)
 
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
     set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h725xx.S)
-    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h725xe.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
     set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h725xx.S)
-    set(LINKER_FILE TOOLCHAIN_ARM/stm32h725xe.sct)
 endif()
 
 add_library(mbed-stm32h725xe INTERFACE)
@@ -23,6 +21,4 @@ target_sources(mbed-stm32h725xe
         ${STARTUP_FILE}
 )
 
-mbed_set_linker_script(mbed-stm32h725xe ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
-
 target_link_libraries(mbed-stm32h725xe INTERFACE mbed-stm32h7)

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/CMakeLists.txt

@@ -6,7 +6,6 @@ add_library(mbed-wio-h725ae INTERFACE)
 target_sources(mbed-wio-h725ae
     INTERFACE
         PeripheralPins.c
-        system_clock_override.c
 )
 
 target_include_directories(mbed-wio-h725ae

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h

@@ -19,5 +19,4 @@
 
 #define NVIC_NUM_VECTORS        180
 #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
-
 #endif

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt

@@ -3,10 +3,8 @@
 
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
     set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h735xx.S)
-    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h735xg.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
     set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h735xx.S)
-    set(LINKER_FILE TOOLCHAIN_ARM/stm32h735xg.sct)
 endif()
 
 add_library(mbed-stm32h735xg INTERFACE)
@@ -21,6 +19,4 @@ target_sources(mbed-stm32h735xg
         ${STARTUP_FILE}
 )
 
-mbed_set_linker_script(mbed-stm32h735xg ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
-
 target_link_libraries(mbed-stm32h735xg INTERFACE mbed-stm32h7)