Fix clippy warnings

.github/workflows/ci.yml

@@ -35,6 +35,12 @@ jobs:
       - name: Build
         run: cargo build --release --verbose --target ${{ matrix.target }}
 
+      - name: Lint
+        run: cargo clippy --release --verbose --target ${{ matrix.target }} -- -D warnings
+
+      - name: fmt
+        run: cargo fmt --check
+
       - name: Build examples
         run: cargo build --verbose --examples --target ${{ matrix.target }}
         if: matrix.target != 'x86_64-unknown-linux-gnu'

examples/flash.rs

@@ -175,12 +175,12 @@ fn main() -> ! {
     buf[..4].copy_from_slice(&data);
 
     flash
-        .write_native(WHERE, &generic_array::GenericArray::from_slice(&buf))
+        .write_native(WHERE, generic_array::GenericArray::from_slice(&buf))
         .unwrap();
     buf[0] = 37;
     // // buf[3] = 37;
     flash
-        .write_native(WHERE, &generic_array::GenericArray::from_slice(&buf))
+        .write_native(WHERE, generic_array::GenericArray::from_slice(&buf))
         .unwrap();
     flash.write_u8(0x4_000F, 69).ok();
     flash.read(WHERE, &mut read_buf);

examples/i2c.rs

@@ -15,7 +15,6 @@ use hal::{
     time::Hertz,
 };
 
-use ssd1306;
 use ssd1306::prelude::*;
 
 #[entry]

examples/pfr.rs

@@ -67,7 +67,7 @@ fn main() -> ! {
     dump_cfpa(&cfpa);
 
     heprintln!("Increment the version and write back cfpa!").ok();
-    cfpa.version = cfpa.version + 1;
+    cfpa.version += 1;
     cfpa.secure_fw_version += 1;
     cfpa.ns_fw_version += 1;
     // increment a byte of customer data (with overflow)

examples/prince.rs

@@ -29,7 +29,7 @@ fn main() -> ! {
     let mut syscon = hal.syscon;
 
     // prince region 2 (128KB)
-    const DATA_ADDR: usize = 0x00080000 + 0;
+    const DATA_ADDR: usize = 0x00080000;
 
     let _clocks = hal::ClockRequirements::default()
         .system_frequency(12.MHz())
@@ -47,7 +47,7 @@ fn main() -> ! {
 
     hprintln!("writing AA's to flash data.").ok();
 
-    flash.erase_page((DATA_ADDR / 512) + 0).unwrap();
+    flash.erase_page((DATA_ADDR / 512)).unwrap();
     flash.erase_page((DATA_ADDR / 512) + 1).unwrap();
 
     prince.write_encrypted(|_prince| {
@@ -60,7 +60,7 @@ fn main() -> ! {
 
     for i in 0..buf.len() {
         let ptr = DATA_ADDR as *const u8;
-        buf[i] = unsafe { *ptr.offset(i as isize) };
+        buf[i] = unsafe { *ptr.add(i) };
     }
 
     dump_hex!(&buf[0..32]);
@@ -70,7 +70,7 @@ fn main() -> ! {
 
     for i in 0..buf.len() {
         let ptr = DATA_ADDR as *const u8;
-        buf[i] = unsafe { *ptr.offset(i as isize) };
+        buf[i] = unsafe { *ptr.add(i) };
     }
 
     hprintln!("Read bytes PRINCE OFF:").ok();

examples/pwm.rs

@@ -96,7 +96,7 @@ fn main() -> ! {
         }
 
         for i in 0..3 {
-            let duty = (sin(duties[i] * 3.14159265f32 / 180f32) * 255f32) as u16;
+            let duty = (sin(duties[i] * 3.141_592_7_f32 / 180f32) * 255f32) as u16;
             match i {
                 0 => {
                     // need to tune down red some

examples/semihosting.rs

@@ -28,7 +28,7 @@ fn main() -> ! {
     // dbg!(UUID);
     let mut uuid: [u32; 4] = [0; 4];
     for i in 0..4 {
-        uuid[i] = unsafe { dbg!(UUID.offset(i as isize).read_volatile()) };
+        uuid[i] = unsafe { dbg!(UUID.add(i).read_volatile()) };
     }
     // dbg!(uuid);
 

examples/touch.rs

@@ -58,7 +58,7 @@ fn main() -> ! {
 
     let button_pins = ButtonPins(but1, but2, but3);
 
-    let adc = hal::Adc::from(hal.adc).enabled(&mut hal.pmc, &mut hal.syscon);
+    let adc = hal.adc.enabled(&mut hal.pmc, &mut hal.syscon);
 
     let touch_timer = hal
         .ctimer
@@ -70,7 +70,7 @@ fn main() -> ! {
         .enabled(&mut hal.syscon, clocks.support_1mhz_fro_token().unwrap());
     let charge_pin = pins.pio1_16.into_match_output(&mut iocon);
 
-    let mut dma = hal::Dma::from(hal.dma).enabled(&mut hal.syscon);
+    let mut dma = hal.dma.enabled(&mut hal.syscon);
 
     let touch_sensor = TouchSensor::new(
         [13_900, 13_900, 13_900],

examples/usb_test_class.rs

@@ -62,9 +62,9 @@ fn main() -> ! {
 
     const VID: u16 = 0x16c0;
     const PID: u16 = 0x05dc;
-    const MANUFACTURER: &'static str = "TestClass Manufacturer";
-    const PRODUCT: &'static str = "virkkunen.net usb-device TestClass";
-    const SERIAL_NUMBER: &'static str = "TestClass Serial";
+    const MANUFACTURER: &str = "TestClass Manufacturer";
+    const PRODUCT: &str = "virkkunen.net usb-device TestClass";
+    const SERIAL_NUMBER: &str = "TestClass Serial";
 
     let mut test = TestClass::new(&usb_bus);
     let mut usb_dev = UsbDeviceBuilder::new(&usb_bus, UsbVidPid(VID, PID))

src/drivers/aes.rs

@@ -162,7 +162,7 @@ impl<'a, Size: KeySize> Aes<'a, Size> {
 
     fn one_block(&self, block: &mut Block<Self>) {
         // needs to be word-aligned
-        let aligned_block: Aligned<A4, Block<Self>> = Aligned(block.clone());
+        let aligned_block: Aligned<A4, Block<Self>> = Aligned(*block);
         let addr: u32 = &aligned_block as *const _ as _;
 
         self.memaddr.write(|w| unsafe { w.bits(addr) });
@@ -182,12 +182,12 @@ impl<'a, Size: KeySize> Aes<'a, Size> {
 
 // the `block-cipher` traits
 
-impl<'a, Size: KeySize> BlockCipher for Aes<'a, Size> {
+impl<Size: KeySize> BlockCipher for Aes<'_, Size> {
     type BlockSize = U16;
     type ParBlocks = U1;
 }
 
-impl<'a, Size: KeySize> BlockEncrypt for Aes<'a, Size> {
+impl<Size: KeySize> BlockEncrypt for Aes<'_, Size> {
     fn encrypt_block(&self, block: &mut Block<Self>) {
         // unfortunate implementation detail
         if self.cryptcfg.read().aesdecrypt().is_decrypt() {
@@ -197,7 +197,7 @@ impl<'a, Size: KeySize> BlockEncrypt for Aes<'a, Size> {
     }
 }
 
-impl<'a, Size: KeySize> BlockDecrypt for Aes<'a, Size> {
+impl<Size: KeySize> BlockDecrypt for Aes<'_, Size> {
     fn decrypt_block(&self, block: &mut Block<Self>) {
         // unfortunate implementation detail
         if self.cryptcfg.read().aesdecrypt().is_encrypt() {
@@ -210,12 +210,12 @@ impl<'a, Size: KeySize> BlockDecrypt for Aes<'a, Size> {
 impl<Size: KeySize> core::ops::Deref for Aes<'_, Size> {
     type Target = Hashcrypt<Enabled>;
     fn deref(&self) -> &Self::Target {
-        &self.inner
+        self.inner
     }
 }
 
 impl<Size: KeySize> core::ops::DerefMut for Aes<'_, Size> {
     fn deref_mut(&mut self) -> &mut Self::Target {
-        &mut self.inner
+        self.inner
     }
 }

src/drivers/clocks.rs

@@ -1,10 +1,10 @@
-///!* API to configure the clocks.
-///!
-///! This is very incomplete (e.g., no support for PLL clocks).
-///! It is also likely buggy, and more complex than needed
-///!
-///! It is currently used to prepare for using the USBFSD and
-///! Flexcomm peripherals.
+//!* API to configure the clocks.
+//!
+//! This is very incomplete (e.g., no support for PLL clocks).
+//! It is also likely buggy, and more complex than needed
+//!
+//! It is currently used to prepare for using the USBFSD and
+//! Flexcomm peripherals.
 use core::{cmp::min, convert::TryFrom};
 use embedded_time::rate::Extensions;
 
@@ -114,6 +114,9 @@ pub struct Pll {
 
 impl Pll {
     // allow user to override if they know better...
+    /// # Safety
+    ///
+    /// Input values must be valid for PLL
     pub unsafe fn new(n: u8, m: u16, p: u8) -> Pll {
         // UM 4.6.6.3.2
         let selp = min((m >> 2) + 1, 31) as u8;
@@ -441,6 +444,9 @@ impl ClockRequirements {
     }
 
     /// Same as above, but allows clock to be changed after an initial configuration.
+    ///
+    /// # Safety
+    ///
     /// This is unsafe because it's up to the developer to ensure the new configuration is okay for
     /// the device peripherals being used.
     pub unsafe fn reconfigure(self, _clocks: Clocks, pmc: &mut Pmc, syscon: &mut Syscon) -> Clocks {

src/drivers/i2c.rs

@@ -19,6 +19,7 @@ pub mod prelude {
 
 /// I2C error
 #[derive(Debug)]
+#[non_exhaustive]
 pub enum Error {
     /// Bus error (catch-all)
     Bus,
@@ -30,9 +31,6 @@ pub enum Error {
     NackData,
     /// Start/Stop error
     StartStop,
-
-    #[doc(hidden)]
-    _Extensible,
 }
 
 pub type Result<T> = core::result::Result<T, Error>;

src/drivers/pins.rs

@@ -118,6 +118,9 @@ macro_rules! pins {
                 Self::set_all_released();
             }
 
+            /// # Safety
+            ///
+            /// Steals the PIN, must not be called if the PIN is already owned
             pub unsafe fn steal() -> Self {
                 Self {
                     $(
@@ -185,6 +188,9 @@ macro_rules! pins {
                     unsafe { PIN_TAKEN[$port][$number] = false; }
                 }
 
+                /// # Safety
+                ///
+                /// Steals the PIN, must not be called if the PIN is already owned
                 pub unsafe fn steal() -> Pin<Self, $default_state_ty> {
                     PIN_TAKEN[$port][$number] = true;
                     Pin {

src/drivers/pwm.rs

@@ -56,7 +56,7 @@ where
         // Start timer
         timer.tcr.write(|w| w.crst().clear_bit().cen().set_bit());
 
-        Self { timer: timer }
+        Self { timer }
     }
 
     pub fn release(self) -> TIMER {
@@ -80,7 +80,7 @@ where
 
     fn enable(&mut self, channel: Self::Channel) {
         match channel {
-            0 | 1 | 2 => {}
+            0..=2 => {}
             _ => {
                 panic!("Cannot use channel outside 0-2 for PWM.");
             }

src/drivers/rng.rs

@@ -41,7 +41,8 @@ impl rand_core::RngCore for Rng<init_state::Enabled> {
     }
 
     fn try_fill_bytes(&mut self, dest: &mut [u8]) -> Result<(), rand_core::Error> {
-        Ok(self.fill_bytes(dest))
+        self.fill_bytes(dest);
+        Ok(())
     }
 }
 

src/drivers/serial.rs

@@ -19,6 +19,7 @@ pub mod config;
 
 /// Serial error
 #[derive(Debug)]
+#[non_exhaustive]
 pub enum Error {
     /// Framing error
     Framing,
@@ -28,8 +29,6 @@ pub enum Error {
     Overrun,
     /// Parity check error
     Parity,
-    #[doc(hidden)]
-    _Extensible,
 }
 
 // /// Interrupt event
@@ -101,7 +100,7 @@ where
     pub fn new(usart: USART, pins: PINS, config: config::Config) -> Self {
         use self::config::*;
 
-        let speed: Hertz = config.speed.into();
+        let speed: Hertz = config.speed;
         let speed: u32 = speed.0;
 
         usart

src/drivers/sha.rs

@@ -127,7 +127,7 @@ impl<Size: OutputSize> Sha<'_, Size> {
     // relevant code is ~line 800 in fsl_hashcrypt.c
     fn process_block(peripheral: &mut Hashcrypt<Enabled>, input: &GenericArray<u8, BlockSize>) {
         // input must be word-aligned
-        let input: Aligned<A4, GenericArray<u8, BlockSize>> = Aligned(input.clone());
+        let input: Aligned<A4, GenericArray<u8, BlockSize>> = Aligned(*input);
         let addr: u32 = &input[0] as *const _ as _;
         assert_eq!(addr & 0x3, 0);
         while peripheral.raw.status.read().waiting().is_not_waiting() {

src/drivers/spi.rs

@@ -1,11 +1,10 @@
-///! There are 8 "normal" SPIs and on high-speed SPI.
-///! The high-speed SPI is tied to Flexcomm8, which it does not
-///! share with any other peripherals.
-///!
-///! SPI3, SPI4, and this high-speed SPI8 have 4 possible chip selects,
-///! whereas the others have two.
-///
-///
+//! There are 8 "normal" SPIs and on high-speed SPI.
+//! The high-speed SPI is tied to Flexcomm8, which it does not
+//! share with any other peripherals.
+//!
+//! SPI3, SPI4, and this high-speed SPI8 have 4 possible chip selects,
+//! whereas the others have two.
+
 use core::marker::PhantomData;
 
 use crate::time::Hertz;
@@ -29,15 +28,14 @@ pub mod prelude {
 /// SPI error
 /// TODO: Use the actual ones from the chip
 #[derive(Debug)]
+#[non_exhaustive]
 pub enum Error {
     /// Overrun occurred
     Overrun,
     /// Mode fault occurred
     ModeFault,
     /// CRC error
     Crc,
-    #[doc(hidden)]
-    _Extensible,
 }
 
 pub type Result<T> = nb::Result<T, Error>;

src/drivers/timer.rs

@@ -25,7 +25,7 @@ where
     TIMER: Ctimer<init_state::Enabled>,
 {
     pub fn new(timer: TIMER) -> Self {
-        Self { timer: timer }
+        Self { timer }
     }
 
     pub fn release(self) -> TIMER {