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update DXILProperty uses
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- update existing wave ops to specify the `IsWave` property
- update the `Barrier` op to specify the `IsBarrier` property
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inbelic committed Dec 16, 2024
1 parent 2e4d5c2 commit b99955f
Showing 1 changed file with 6 additions and 0 deletions.
6 changes: 6 additions & 0 deletions llvm/lib/Target/DirectX/DXIL.td
Original file line number Diff line number Diff line change
Expand Up @@ -841,6 +841,7 @@ def Barrier : DXILOp<80, barrier> {
let result = VoidTy;
let stages = [Stages<DXIL1_0, [compute, library]>];
let attributes = [Attributes<DXIL1_0, []>];
let properties = [IsBarrier];
}

def Discard : DXILOp<82, discard> {
Expand Down Expand Up @@ -915,6 +916,7 @@ def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
let arguments = [];
let result = Int1Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}

def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
Expand All @@ -924,6 +926,7 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadOnly]>];
let properties = [IsWave];
}

def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
Expand All @@ -933,6 +936,7 @@ def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
let arguments = [Int1Ty];
let result = Int1Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}

def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> {
Expand All @@ -943,6 +947,7 @@ def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> {
let overloads = [Overloads<
DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}

def WaveAllBitCount : DXILOp<135, waveAllOp> {
Expand All @@ -951,6 +956,7 @@ def WaveAllBitCount : DXILOp<135, waveAllOp> {
let arguments = [Int1Ty];
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}

def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
Expand Down

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