Add AlwaysMergeDMB option

kuaiwei · Jan 24, 2024 · 056c185 · 056c185
1 parent e4081bc
commit 056c185
Show file tree

Hide file tree

Showing 3 changed files with 7 additions and 2 deletions.
diff --git a/src/hotspot/cpu/aarch64/globals_aarch64.hpp b/src/hotspot/cpu/aarch64/globals_aarch64.hpp
@@ -127,6 +127,8 @@ define_pd_global(intx, InlineSmallCode,          1000);
           range(1, 99)                                                  \
   product(ccstr, UseBranchProtection, "none",                           \
           "Branch Protection to use: none, standard, pac-ret")          \
+  product(bool, AlwaysMergeDMB, false,                                  \
+          "Always merge DMB instructions in code emission")             \
 
 // end of ARCH_FLAGS
 

diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
@@ -2067,9 +2067,9 @@ void MacroAssembler::membar(Membar_mask_bits order_constraint) {
   if (last != nullptr && nativeInstruction_at(last)->is_Membar() && prev == last) {
     NativeMembar *bar = NativeMembar_at(prev);
     // Don't promote DMB ST|DMB LD to DMB (a full barrier) because
-    // doing so would introduce  a StoreLoad which  the caller did not
+    // doing so would introduce a StoreLoad which the caller did not
     // intend
-    if (bar->get_kind() == order_constraint
+    if (AlwaysMergeDMB || bar->get_kind() == order_constraint
         || bar->get_kind() == AnyAny
         || order_constraint == AnyAny) {
       // We are merging two memory barrier instructions.  On AArch64 we

diff --git a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
@@ -183,6 +183,9 @@ void VM_Version::initialize() {
     if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
       FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
     }
+    if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) {
+      FLAG_SET_DEFAULT(AlwaysMergeDMB, true);
+    }
   }
 
   // Cortex A53