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Add RegisterNestedTensorXPU codegen #1140

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Add RegisterNestedTensorXPU codegen #1140

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d586ee5
Add RegisterNestedTensorXPU codegen
min-jean-cho Dec 3, 2024
6159ef4
Merge branch 'main' into minjean/nested_tensor
min-jean-cho Dec 10, 2024
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8 changes: 6 additions & 2 deletions cmake/Codegen.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ set(BUILD_TORCH_XPU_ATEN_GENERATED "${CMAKE_BINARY_DIR}/xpu/ATen/")
file(MAKE_DIRECTORY ${BUILD_TORCH_XPU_ATEN_GENERATED})

set(RegisterXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterXPU.cpp)
set(RegisterNestedTensorXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterNestedTensorXPU.cpp
set(RegisterSparseXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterSparseXPU.cpp)
set(XPUFallback_PATH ${TORCH_XPU_OPS_ROOT}/src/ATen/native/xpu/XPUFallback.template)

Expand Down Expand Up @@ -46,6 +47,7 @@ endfunction(GEN_BACKEND)


set(RegisterXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterXPU.cpp)
set(RegisterNestedTensorXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterNestedTensorXPU.cpp)
set(RegisterSparseXPU_PATH ${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterSparseXPU.cpp)
set(XPUFallback_PATH ${TORCH_XPU_OPS_ROOT}/src/ATen/native/xpu/XPUFallback.template)
set(XPU_AOTI_INSTALL_DIR ${TORCH_ROOT}/torch/csrc/inductor/aoti_torch/generated/extend)
Expand Down Expand Up @@ -77,7 +79,7 @@ function(GEN_XPU file_yaml)
--install-dir ${BUILD_TORCH_XPU_ATEN_GENERATED}
--per-operator-headers
--static-dispatch-backend
--backend-whitelist XPU SparseXPU
--backend-whitelist XPU NestedTensorXPU SparseXPU
# --xpu: generate in-tree RegisterXPU.cpp for in-tree OPs
--xpu
# --update-aoti-c-shim: generate extend/c_shim_xpu.h
Expand All @@ -92,6 +94,7 @@ function(GEN_XPU file_yaml)
${REGISTER_FALLBACK_CMD}
# Codegen post-process
COMMAND "${PYTHON_EXECUTABLE}" ${TORCH_XPU_OPS_ROOT}/tools/codegen/remove_headers.py --register_xpu_path ${RegisterXPU_PATH}
COMMAND "${PYTHON_EXECUTABLE}" ${TORCH_XPU_OPS_ROOT}/tools/codegen/remove_headers.py --register_xpu_path ${RegisterNestedTensorXPU_PATH}
COMMAND "${PYTHON_EXECUTABLE}" ${TORCH_XPU_OPS_ROOT}/tools/codegen/remove_headers.py --register_xpu_path ${RegisterSparseXPU_PATH}
${SIMPLE_TRACE}
WORKING_DIRECTORY ${TORCH_ROOT}
Expand Down Expand Up @@ -121,6 +124,7 @@ GEN_XPU(
native_functions.yaml
${BUILD_TORCH_XPU_ATEN_GENERATED}/XPUFunctions.h
${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterXPU.cpp
${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterNestedTensorXPU.cpp
${BUILD_TORCH_XPU_ATEN_GENERATED}/RegisterSparseXPU.cpp
${XPU_AOTI_INSTALL_DIR}/c_shim_xpu.h
${XPU_AOTI_INSTALL_DIR}/c_shim_xpu.cpp
Expand All @@ -133,7 +137,7 @@ GEN_XPU(
# $TORCH_XPU_OPS_INCLUDE_DIRS, so that "#include <ATen/ops/*.h>" works.
list(APPEND TORCH_XPU_OPS_INCLUDE_DIRS ${CMAKE_BINARY_DIR}/xpu)

list(APPEND xpu_generated_src ${RegisterXPU_PATH} ${RegisterSparseXPU_PATH})
list(APPEND xpu_generated_src ${RegisterXPU_PATH} ${RegisterNestedTensorXPU_PATH} ${RegisterSparseXPU_PATH})
list(APPEND xpu_generated_src ${XPU_AOTI_INSTALL_DIR}/c_shim_xpu.cpp)
add_custom_target(TORCH_XPU_GEN_TARGET DEPENDS ${xpu_generated_src})
set(ATen_XPU_GEN_SRCS ${xpu_generated_src})
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