Revert "[Decode] SW WA for Check HuC authentication status in ACM D3 …

…cold state"

This reverts commit intel-innersource/drivers.gpu.unified#b4440bd6b

media_common/agnostic/common/hw/mhw_mmio.h

@@ -99,7 +99,6 @@ struct MmioRegistersHuc
     uint32_t                    hucStatusRegOffset = 0;
     uint32_t                    hucUKernelHdrInfoRegOffset = 0;
     uint32_t                    hucStatus2RegOffset = 0;
-    uint32_t                    hucLoadInfoOffset = 0;
 };
 
 //!

media_driver/agnostic/gen12/hw/mhw_mi_g12_X.cpp

@@ -235,44 +235,6 @@ MOS_STATUS MhwMiInterfaceG12::AddMiBatchBufferStartCmd(
     return MOS_STATUS_SUCCESS;
 }
 
-MOS_STATUS MhwMiInterfaceG12::AddMiBatchBufferStartCmd(
-    PMOS_COMMAND_BUFFER cmdBuffer,
-    PMHW_BATCH_BUFFER   batchBuffer,
-    bool useChainedBB)
-{
-    MHW_FUNCTION_ENTER;
-
-    MHW_MI_CHK_NULL(cmdBuffer);
-    MHW_MI_CHK_NULL(batchBuffer);
-    MHW_MI_CHK_NULL(m_osInterface);
-    bool vcsEngineUsed =
-        MOS_VCS_ENGINE_USED(m_osInterface->pfnGetGpuContext(m_osInterface));
-
-    mhw_mi_g12_X::MI_BATCH_BUFFER_START_CMD cmd;
-    MHW_RESOURCE_PARAMS                     resourceParams;
-    MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
-    resourceParams.presResource    = &batchBuffer->OsResource;
-    resourceParams.dwOffset        = batchBuffer->dwOffset;
-    resourceParams.pdwCmd          = cmd.DW1_2.Value;
-    resourceParams.dwLocationInCmd = 1;
-    resourceParams.dwLsbNum        = MHW_COMMON_MI_GENERAL_SHIFT;
-    resourceParams.HwCommandType   = vcsEngineUsed ? MOS_MI_BATCH_BUFFER_START : MOS_MI_BATCH_BUFFER_START_RCS;
-
-    MHW_MI_CHK_STATUS(AddResourceToCmd(
-        m_osInterface,
-        cmdBuffer,
-        &resourceParams));
-
-    // Set BB start
-    cmd.DW0.Obj3.SecondLevelBatchBuffer = useChainedBB ? false : true;
-    cmd.DW0.Obj0.AddressSpaceIndicator  = !IsGlobalGttInUse();
-
-    // Send BB start command
-    MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
-
-    return MOS_STATUS_SUCCESS;
-}
-
 MOS_STATUS MhwMiInterfaceG12::AddMiConditionalBatchBufferEndCmd(
     PMOS_COMMAND_BUFFER                             cmdBuffer,
     PMHW_MI_CONDITIONAL_BATCH_BUFFER_END_PARAMS     params)

media_driver/agnostic/gen12/hw/mhw_mi_g12_X.h

@@ -70,11 +70,6 @@ struct MhwMiInterfaceG12 : public MhwMiInterfaceGeneric<mhw_mi_g12_X>
         PMOS_COMMAND_BUFFER             cmdBuffer,
         PMHW_BATCH_BUFFER               batchBuffer) override;
 
-    MOS_STATUS AddMiBatchBufferStartCmd(
-        PMOS_COMMAND_BUFFER cmdBuffer,
-        PMHW_BATCH_BUFFER   batchBuffer,
-        bool useChainedBB = false);
-
     MOS_STATUS AddMiStoreRegisterMemCmd(
         PMOS_COMMAND_BUFFER                 cmdBuffer,
         PMHW_MI_STORE_REGISTER_MEM_PARAMS   params) override;

media_driver/agnostic/gen12/hw/mhw_mmio_g12.h

@@ -90,8 +90,7 @@
 #define HUC_UKERNEL_HDR_INFO_REG_OFFSET_NODE_1_INIT_G12                                  0x1C2014
 #define HUC_STATUS_REG_OFFSET_NODE_1_INIT_G12                                            0x1C2000
 #define HUC_STATUS2_REG_OFFSET_NODE_1_INIT_G12                                           0x1C23B0
-#define HUC_LOAD_INFO_REG_OFFSET_G12                                                     0xC1DC
-#define HUC_LOAD_INFO_REG_MASK_G12                                                       0x1
+
 
 //VDBOX MFX register offsets 
 #define GENERAL_PURPOSE_REGISTER0_LO_OFFSET_NODE_1_INIT_G12                              0x1C0600

media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_huc_g12_X.cpp

@@ -35,7 +35,6 @@ void MhwVdboxHucInterfaceG12::InitMmioRegisters()
     mmioRegisters->hucUKernelHdrInfoRegOffset = HUC_UKERNEL_HDR_INFO_REG_OFFSET_NODE_1_INIT_G12;
     mmioRegisters->hucStatusRegOffset         = HUC_STATUS_REG_OFFSET_NODE_1_INIT_G12;
     mmioRegisters->hucStatus2RegOffset        = HUC_STATUS2_REG_OFFSET_NODE_1_INIT_G12;
-    mmioRegisters->hucLoadInfoOffset          = HUC_LOAD_INFO_REG_OFFSET_G12;
 
     m_mmioRegisters[MHW_VDBOX_NODE_2] = m_mmioRegisters[MHW_VDBOX_NODE_1];
 }

media_driver/media_softlet/agnostic/Xe_M/Xe_M_base/codec/hal/dec/hevc/packet/decode_huc_s2l_packet_m12.cpp

@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2019-2023, Intel Corporation
+* Copyright (c) 2019, Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -44,24 +44,11 @@ namespace decode {
             DECODE_CHK_NULL(m_s2lDmemBufferArray);
         }
 
-        if (m_hucAuthPkt != nullptr)
-        {
-            // allocate resources for huc auth packet
-            DECODE_CHK_STATUS(m_hucAuthPkt->Init());
-        }
-
         return MOS_STATUS_SUCCESS;
     }
 
     MOS_STATUS HucS2lPktM12::Destroy()
     {
-        if (m_hucAuthPkt != nullptr)
-        {
-            // destroy resources allocated in huc auth packet
-            DECODE_CHK_STATUS(m_hucAuthPkt->Destroy());
-            MOS_Delete(m_hucAuthPkt);
-        }
-
         DECODE_CHK_STATUS(m_allocator->Destroy(m_s2lDmemBufferArray));
         DECODE_CHK_STATUS(HucS2lPktXe_M_Base::Destroy());
         return MOS_STATUS_SUCCESS;
@@ -110,12 +97,6 @@ namespace decode {
 
         DECODE_CHK_NULL(m_hucInterface);
 
-        if (m_hucAuthPkt != nullptr)
-        {
-            // add huc auth check cmds
-            DECODE_CHK_STATUS(m_hucAuthPkt->Execute(cmdBuffer));
-        }
-
         if (prologNeeded)
         {
             DECODE_CHK_STATUS(AddForceWakeup(cmdBuffer, false, true));