[Encode] Modify AV1 RhoDomain

* [Encode] Modify AV1 RhoDomain Modify AV1 RhoDomain.
intel · Aug 14, 2024 · 9a86241 · 9a86241
1 parent 5641059
commit 9a86241
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Showing 5 changed files with 30 additions and 51 deletions.
diff --git a/media_softlet/agnostic/Xe2_M_plus/Xe2_LPM/hw/vdbox/mhw_vdbox_avp_hwcmd_xe2_lpm.h b/media_softlet/agnostic/Xe2_M_plus/Xe2_LPM/hw/vdbox/mhw_vdbox_avp_hwcmd_xe2_lpm.h
@@ -42,6 +42,10 @@
 #include <cstddef>
 #include "media_class_trace.h"
 
+#ifdef IGFX_AVP_INTERFACE_EXT_SUPPORT
+#include "mhw_vdbox_avp_hwcmd_ext.h"
+#endif
+
 namespace mhw
 {
 namespace vdbox
@@ -795,7 +799,7 @@ class Cmd
                 uint32_t                 Reserved1650                                     : __CODEGEN_BITFIELD(18, 24)    ; //!< Reserved
                 uint32_t                 FrameszoverstatusenFramebitratemaxreportmask     : __CODEGEN_BITFIELD(25, 25)    ; //!< FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK
                 uint32_t                 FrameszunderstatusenFramebitrateminreportmask    : __CODEGEN_BITFIELD(26, 26)    ; //!< FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK
-                uint32_t                 RhoDomainStreamoutEnableFlag                     : __CODEGEN_BITFIELD(27, 27)    ; //!< Rho Domain Streamout Enable Flag
+                uint32_t                 AVP_PIC_STATE_DW51_BIT27                         : __CODEGEN_BITFIELD(27, 27)    ; 
                 uint32_t                 Reserved1660                                     : __CODEGEN_BITFIELD(28, 31)    ; //!< Reserved
             };
             uint32_t                     Value;
@@ -909,7 +913,7 @@ class Cmd
         {
             struct
             {
-                uint32_t                 RhoDomainQp                                      : __CODEGEN_BITFIELD( 0,  7)    ; //!< Rho Domain QP
+                uint32_t                 AVP_PIC_STATE_DW75_BIT0                          : __CODEGEN_BITFIELD( 0,  7)    ; 
                 uint32_t                 Reserved8                                        : __CODEGEN_BITFIELD( 8, 31)    ; //!< Reserved MBZ
             };
             uint32_t                     Value;
@@ -2197,8 +2201,8 @@ class Cmd
         MEMORYADDRESSATTRIBUTES_CMD              SSETileLineReadWriteBufferAddressAttributes;                             //!< DW208, SSE Tile Line Read/Write Buffer Address Attributes
         SPLITBASEADDRESS64BYTEALIGNED_CMD        PostCDEFpixelsBufferAddress;                                             //!< DW209..210, PostCDEF pixels Buffer Address
         MEMORYADDRESSATTRIBUTES_CMD              PostCDEFpixelsBufferAddressAttributes;                                   //!< DW211, PostCDEF pixels Buffer Address Attributes
-        SPLITBASEADDRESS64BYTEALIGNED_CMD        RhoDomainThresholdsBufferAddress;                                        //!< DW212..213, Rho Domain Thresholds Buffer Address
-        MEMORYADDRESSATTRIBUTES_CMD              RhoDomainThresholdsBufferAddressAttributes;                              //!< DW214, Rho Domain Thresholds Buffer Address Attributes
+        SPLITBASEADDRESS64BYTEALIGNED_CMD        AVP_PIPE_BUF_ADDR_STATE_DW212;                                           
+        MEMORYADDRESSATTRIBUTES_CMD              AVP_PIPE_BUF_ADDR_STATE_DW214;                              
 
         //! \name Local enumerations
 

diff --git a/media_softlet/agnostic/Xe2_M_plus/Xe2_LPM/hw/vdbox/mhw_vdbox_avp_impl_xe2_lpm.h b/media_softlet/agnostic/Xe2_M_plus/Xe2_LPM/hw/vdbox/mhw_vdbox_avp_impl_xe2_lpm.h
@@ -31,6 +31,10 @@
 #include "mhw_vdbox_avp_impl_xe2_lpm_base.h"
 #include "mhw_vdbox_avp_hwcmd_xe2_lpm.h"
 
+#ifdef IGFX_AVP_INTERFACE_EXT_SUPPORT
+#include "mhw_vdbox_avp_impl_xe2_lpm_ext.h"
+#endif
+
 namespace mhw
 {
 namespace vdbox
@@ -55,53 +59,20 @@ class Impl : public BaseImpl<Cmd>
         _MHW_SETCMD_CALLBASE(AVP_PIC_STATE);
 
 #ifdef _MEDIA_RESERVED
-    #define DO_FIELDS()                                                   \
-    DO_FIELD(DW64, Reserved2048, params.avpPicStatePar0);                 \
-    DO_FIELD(DW51, RhoDomainStreamoutEnableFlag, params.rhoDomainEnable); \
-    DO_FIELD(DW75, RhoDomainQp, params.rhoDomainQP);                      
-    #include "mhw_hwcmd_process_cmdfields.h"   
-#else
-    #define DO_FIELDS()       \
-
-    #include "mhw_hwcmd_process_cmdfields.h"                      
-#endif   
-
+    #define DO_FIELDS_EXT() \
+        __MHW_VDBOX_AVP_WRAPPER_EXT(AVP_PIC_STATE_IMPL_XE2_LPM)              
+#endif  
+    #include "mhw_hwcmd_process_cmdfields.h"
     }
 
     _MHW_SETCMD_OVERRIDE_DECL(AVP_PIPE_BUF_ADDR_STATE)
     {
         _MHW_SETCMD_CALLBASE(AVP_PIPE_BUF_ADDR_STATE);
 
-        MHW_RESOURCE_PARAMS resourceParams = {};
-        resourceParams.dwLsbNum            = MHW_VDBOX_HCP_GENERAL_STATE_SHIFT;
-        resourceParams.HwCommandType       = MOS_MFX_PIPE_BUF_ADDR;
-
-        if (!Mos_ResourceIsNull(params.rhoDomainThresholdTableBuffer))
-        {
-            InitMocsParams(resourceParams, &cmd.RhoDomainThresholdsBufferAddressAttributes.DW0.Value, 1, 6);
-
-            MOS_SURFACE details = {};
-            MOS_ZeroMemory(&details, sizeof(details));
-            details.Format = Format_Invalid;
-            MHW_MI_CHK_STATUS(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.rhoDomainThresholdTableBuffer, &details));
-
-            cmd.RhoDomainThresholdsBufferAddressAttributes.DW0.BaseAddressMemoryCompressionEnable = MmcEnabled(params.mmcStatePreDeblock);
-            cmd.RhoDomainThresholdsBufferAddressAttributes.DW0.CompressionType                    = MmcRcEnabled(params.mmcStatePreDeblock);
-            cmd.RhoDomainThresholdsBufferAddressAttributes.DW0.TileMode                           = GetHwTileType(details.TileType, details.TileModeGMM, details.bGMMTileEnabled);
-
-            resourceParams.presResource    = params.rhoDomainThresholdTableBuffer;
-            resourceParams.dwOffset        = 0;
-            resourceParams.pdwCmd          = (cmd.RhoDomainThresholdsBufferAddress.DW0_1.Value);
-            resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(RhoDomainThresholdsBufferAddress);
-            resourceParams.bIsWritable     = true;
-
-            MHW_MI_CHK_STATUS(AddResourceToCmd(
-                this->m_osItf,
-                this->m_currentCmdBuf,
-                &resourceParams));
-        }
-
-        return MOS_STATUS_SUCCESS;
+#ifdef _MEDIA_RESERVED
+        __MHW_VDBOX_AVP_WRAPPER_EXT(AVP_PIPE_BUF_ADDR_STATE_IMPL_XE2_LPM)
+#endif
+        return MOS_STATUS_SUCCESS; 
     }
 MEDIA_CLASS_DEFINE_END(mhw__vdbox__avp__xe2_lpm_base__xe2_lpm__Impl)
 };

diff --git a/media_softlet/agnostic/Xe_M_plus/Xe_LPM_plus/hw/vdbox/mhw_vdbox_avp_hwcmd_xe_lpm_plus.h b/media_softlet/agnostic/Xe_M_plus/Xe_LPM_plus/hw/vdbox/mhw_vdbox_avp_hwcmd_xe_lpm_plus.h
@@ -1,6 +1,6 @@
 /*===================== begin_copyright_notice ==================================
 
-# Copyright (c) 2022, Intel Corporation
+# Copyright (c) 2022-2024, Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a
 # copy of this software and associated documentation files (the "Software"),
@@ -41,6 +41,11 @@
 #include <cstddef>
 #include "media_class_trace.h"
 
+#ifdef IGFX_AVP_INTERFACE_EXT_SUPPORT
+#include "mhw_vdbox_avp_hwcmd_ext.h"
+#endif
+
+
 namespace mhw
 {
 namespace vdbox
@@ -762,7 +767,7 @@ class Cmd
                 uint32_t                 Reserved1650 : __CODEGEN_BITFIELD(18, 24); //!< Reserved
                 uint32_t                 FrameszoverstatusenFramebitratemaxreportmask : __CODEGEN_BITFIELD(25, 25); //!< FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK
                 uint32_t                 FrameszunderstatusenFramebitrateminreportmask : __CODEGEN_BITFIELD(26, 26); //!< FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK
-                uint32_t                 RhoDomainStreamoutEnableFlag : __CODEGEN_BITFIELD(27, 27); //!< Rho Domain Streamout Enable Flag
+                uint32_t                 AVP_PIC_STATE_DW51_BIT27 : __CODEGEN_BITFIELD(27, 27); 
                 uint32_t                 Reserved1660 : __CODEGEN_BITFIELD(28, 31); //!< Reserved
             };
             uint32_t                     Value;

diff --git a/media_softlet/agnostic/common/codec/hal/enc/shared/bufferMgr/encode_recycle_resource.h b/media_softlet/agnostic/common/codec/hal/enc/shared/bufferMgr/encode_recycle_resource.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2018-2023, Intel Corporation
+* Copyright (c) 2018-2024, Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -54,7 +54,6 @@ namespace encode
         BrcPakStatisticBuffer,
         BrcPakStatisticBufferFull,
         PakSliceSizeStreamOutBuffer,
-        RhoDomainStreamoutBuffer,
         CuRecordStreamOutBuffer,
         CuCountBuffer,
         PreEncRawSurface,

diff --git a/media_softlet/agnostic/common/hw/vdbox/mhw_vdbox_avp_cmdpar.h b/media_softlet/agnostic/common/hw/vdbox/mhw_vdbox_avp_cmdpar.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2020-2023, Intel Corporation
+* Copyright (c) 2020-2024, Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -390,7 +390,7 @@ struct _MHW_PAR_T(AVP_PIPE_BUF_ADDR_STATE)
     PMOS_RESOURCE     filmGrainSampleTemplateBuffer    = nullptr;
     PMOS_RESOURCE     filmGrainOutputSurface           = nullptr;
 
-    PMOS_RESOURCE     rhoDomainThresholdTableBuffer    = nullptr;
+    PMOS_RESOURCE     AvpPipeBufAddrStatePar0          = nullptr;
 };
 
 struct _MHW_PAR_T(AVP_INTER_PRED_STATE)