[Decode] RT Log enable on Decode XE3_LPM platform

RT Log enable on Decode XE3_LPM platform
intel · Dec 17, 2024 · 585993d · 585993d
1 parent 2fed5f1
commit 585993d
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Showing 12 changed files with 12 additions and 0 deletions.
diff --git a/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/av1/packet/decode_av1_packet_xe3_lpm_base.cpp b/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/av1/packet/decode_av1_packet_xe3_lpm_base.cpp
@@ -66,6 +66,7 @@ namespace decode
             DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
             auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
             HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+            HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
         }
 
         DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));

diff --git a/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/avc/packet/decode_avc_packet_xe3_lpm_base.cpp b/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/avc/packet/decode_avc_packet_xe3_lpm_base.cpp
@@ -62,6 +62,7 @@ MOS_STATUS AvcDecodePktXe3_Lpm_Base::Submit(
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext,
         m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     if (m_avcBasicFeature->m_cencBuf && m_avcBasicFeature->m_cencBuf->checkStatusRequired)
     {

diff --git a/..._plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_back_end_xe3_lpm_base.cpp b/..._plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_back_end_xe3_lpm_base.cpp
@@ -83,6 +83,7 @@ MOS_STATUS HevcDecodeBackEndPktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     DECODE_CHK_STATUS(m_miItf->AddWatchdogTimerStopCmd(cmdBuffer));
     auto scalability = m_hevcPipeline->GetMediaScalability();

diff --git a/...plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_front_end_xe3_lpm_base.cpp b/...plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_front_end_xe3_lpm_base.cpp
@@ -66,6 +66,7 @@ MOS_STATUS HevcDecodeFrontEndPktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     if (m_hevcPipeline->IsShortFormat())
     {

diff --git a/...e3_M_plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_long_xe3_lpm_base.cpp b/...e3_M_plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_long_xe3_lpm_base.cpp
@@ -94,6 +94,7 @@ MOS_STATUS HevcDecodeLongPktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
 

diff --git a/...plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_real_tile_xe3_lpm_base.cpp b/...plus/Xe3_LPM_base/codec/hal/dec/hevc/packet/decode_hevc_packet_real_tile_xe3_lpm_base.cpp
@@ -81,6 +81,7 @@ MOS_STATUS HevcDecodeRealTilePktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     auto scalability = m_hevcPipeline->GetMediaScalability();
     DECODE_ASSERT(scalability != nullptr);

diff --git a/...tic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/jpeg/packet/decode_jpeg_packet_xe3_lpm_base.cpp b/...tic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/jpeg/packet/decode_jpeg_packet_xe3_lpm_base.cpp
@@ -61,6 +61,7 @@ MOS_STATUS JpegDecodePktXe3_Lpm_Base::Submit(
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext,
         m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
 

diff --git a/...c/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/mpeg2/packet/decode_mpeg2_packet_xe3_lpm_base.cpp b/...c/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/mpeg2/packet/decode_mpeg2_packet_xe3_lpm_base.cpp
@@ -61,6 +61,7 @@ namespace decode
         DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
         auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
         HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+        HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
         DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
 

diff --git a/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/vp8/packet/decode_vp8_packet_xe3_lpm_base.cpp b/...ostic/Xe3_M_plus/Xe3_LPM_base/codec/hal/dec/vp8/packet/decode_vp8_packet_xe3_lpm_base.cpp
@@ -61,6 +61,7 @@ namespace decode
         DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
         auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
         HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+        HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
         DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
         DECODE_CHK_STATUS(PackSliceLevelCmds(*cmdBuffer));

diff --git a/..._M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_back_end_xe3_lpm_base.cpp b/..._M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_back_end_xe3_lpm_base.cpp
@@ -81,6 +81,7 @@ MOS_STATUS Vp9DecodeBackEndPktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     DECODE_CHK_STATUS(m_miItf->AddWatchdogTimerStopCmd(cmdBuffer));
     auto scalability = m_vp9Pipeline->GetMediaScalability();

diff --git a/...M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_front_end_xe3_lpm_base.cpp b/...M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_front_end_xe3_lpm_base.cpp
@@ -64,6 +64,7 @@ MOS_STATUS Vp9DecodeFrontEndPktXe3_Lpm_Base::Submit(
     DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
     auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
     HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+    HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
     DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
     DECODE_CHK_STATUS(PackSliceLevelCmds(*cmdBuffer));

diff --git a/...e3_M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_single_xe3_lpm_base.cpp b/...e3_M_plus/Xe3_LPM_base/codec/hal/dec/vp9/packet/decode_vp9_packet_single_xe3_lpm_base.cpp
@@ -64,6 +64,7 @@ MOS_STATUS Vp9DecodeSinglePktXe3_Lpm_Base::Submit(
         DECODE_CHK_NULL(m_hwInterface->GetVdencInterfaceNext());
         auto mmioRegisters = m_hwInterface->GetVdencInterfaceNext()->GetMmioRegisters(MHW_VDBOX_NODE_1);
         HalOcaInterfaceNext::On1stLevelBBStart(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, m_miItf, *mmioRegisters);
+        HalOcaInterfaceNext::OnDispatch(*cmdBuffer, *m_osInterface, m_miItf, *m_miItf->GetMmioRegisters());
 
         DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
         DECODE_CHK_STATUS(PackSliceLevelCmds(*cmdBuffer));