Linux: Fix media-ctl config for upstream ISYS device

Fixes: b9b10ae55e991547ad9ec517b472890089842f3e Change-Id: Ib7e4004274bf99a6370bcabd7375a7695654c86c Tracked-On: #JILCNT-340 Signed-off-by: Hao Yao <[email protected]>
hao-yao · Oct 31, 2024 · fcd83db · fcd83db
1 parent a2de9c2
commit fcd83db
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Showing 6 changed files with 19 additions and 7 deletions.
diff --git a/config/linux/ipu6/gcss/graph_settings_hm11b1.xml b/config/linux/ipu6/gcss/graph_settings_hm11b1.xml
@@ -262,7 +262,7 @@ limitations under the License.
   <sis_b width="160" height="92" stream_id="60001" />
   <sis_a width="320" height="200" stream_id="60001" />
   <sensor vflip="0" hflip="0" mode_id="11B1_RGBIR">
-            <port_0 format="BG10" width="1292" height="800" />
+            <port_0 format="BG10" width="1312" height="800" />
         </sensor>
   <csi_be>
     <output format="GR10" width="1292" height="800" />
@@ -1131,7 +1131,7 @@ limitations under the License.
   <still0 width="1280" height="720" stream_id="60000" bpp="8" format="Linear" />
   <sis_a_stills_only width="320" height="184" stream_id="60000" />
   <sensor vflip="0" hflip="0" mode_id="11B1_RGBIR">
-            <port_0 format="BG10" width="1292" height="800" />
+            <port_0 format="BG10" width="1312" height="800" />
         </sensor>
   <csi_be>
     <output format="GR10" width="1292" height="800" />

diff --git a/config/linux/ipu6/sensors/hm11b1-uf.xml b/config/linux/ipu6/sensors/hm11b1-uf.xml
@@ -16,12 +16,12 @@
 
 <CameraSettings>
     <Sensor name="hm11b1-uf" description="HM11B1 sensor.">
-        <MediaCtlConfig id="0" ConfigMode="AUTO" outputWidth="1292" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
+        <MediaCtlConfig id="0" ConfigMode="AUTO" outputWidth="1312" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
             <format name="hm11b1 $I2CBUS" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
             <format name="Intel IPU6 CSI-2 $CSI_PORT" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
             <format name="Intel IPU6 CSI2 BE SOC 0" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
-            <format name="Intel IPU6 CSI2 BE SOC 0" pad="1" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
-            <selection name="Intel IPU6 CSI2 BE SOC 0" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1292" height="800"/>
+            <format name="Intel IPU6 CSI2 BE SOC 0" pad="1" width="1312" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <selection name="Intel IPU6 CSI2 BE SOC 0" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1312" height="800"/>
 
             <link srcName="hm11b1 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI-2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI-2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 CSI2 BE SOC 0" sinkPad="0" enable="true"/>
@@ -31,9 +31,11 @@
             <videonode name="Intel IPU6 CSI-2 $CSI_PORT" videoNodeType="VIDEO_ISYS_RECEIVER"/>
             <videonode name="hm11b1 $I2CBUS" videoNodeType="VIDEO_PIXEL_ARRAY"/>
         </MediaCtlConfig>
-        <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1292" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
+        <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1312" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
             <format name="hm11b1 $I2CBUS" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="1312" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1312" height="800"/>
 
             <link srcName="hm11b1 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>
@@ -74,7 +76,7 @@
         <!-- <TuningMode, cmc tag, aiq tag, isp tag, others tag>  -->
         <lardTags value="VIDEO,DFLT,DFLT,DFLT,DFLT"/>
 
-        <supportedISysSizes value="1292x800"/> <!-- ascending order request -->
+        <supportedISysSizes value="1312x800"/> <!-- ascending order request -->
         <supportedISysFormat value="V4L2_PIX_FMT_SGRBG10"/>
         <enableAIQ value="true"/>
         <iSysRawFormat value="V4L2_PIX_FMT_SGRBG10"/>

diff --git a/config/linux/ipu6ep/sensors/ov01a10-uf.xml b/config/linux/ipu6ep/sensors/ov01a10-uf.xml
@@ -36,6 +36,8 @@
         <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1280" outputHeight="798" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
             <format name="ov01a10 $I2CBUS" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="1280" height="798" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="1" width="1280" height="798"/>
 
             <link srcName="ov01a10 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>

diff --git a/config/linux/ipu6ep/sensors/ov8856-uf.xml b/config/linux/ipu6ep/sensors/ov8856-uf.xml
@@ -34,6 +34,8 @@
         <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="3296" outputHeight="2464" format="V4L2_PIX_FMT_SGRBG10"> <!-- RAW10 BE capture -->
             <format name="ov8856 $I2CBUS" pad="0" width="3280" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="3280" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="3296" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="3296" height="2464"/>
 
             <link srcName="ov8856 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>

diff --git a/config/linux/ipu6ep/sensors/ov8856-wf.xml b/config/linux/ipu6ep/sensors/ov8856-wf.xml
@@ -34,6 +34,8 @@
         <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="3296" outputHeight="2464" format="V4L2_PIX_FMT_SGRBG10"> <!-- RAW10 BE capture -->
             <format name="ov8856 $I2CBUS" pad="0" width="3280" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="3280" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="3296" height="2464" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="3296" height="2464"/>
 
             <link srcName="ov8856 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>

diff --git a/config/linux/ipu6epmtl/sensors/ov01a10-uf.xml b/config/linux/ipu6epmtl/sensors/ov01a10-uf.xml
@@ -36,6 +36,8 @@
         <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1280" outputHeight="798" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
             <format name="ov01a10 $I2CBUS" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="1280" height="798" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="1" width="1280" height="798"/>
 
             <link srcName="ov01a10 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>
@@ -212,6 +214,8 @@
         <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1280" outputHeight="798" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture -->
             <format name="ov01a10 $I2CBUS" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
             <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="1280" height="800" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="1280" height="798" format="V4L2_MBUS_FMT_SBGGR10_1X10"/>
+            <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="1" width="1280" height="798"/>
 
             <link srcName="ov01a10 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
             <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>