Skip to content

gtrensch/RedPitayaHelloWorldVHDL

This branch is 129 commits behind lvillasen/RedPitaya-Hello-World-FPGA:master.

Folders and files

NameName
Last commit message
Last commit date

Latest commit

194e28f · Apr 11, 2016

History

6 Commits
Apr 11, 2016
Apr 11, 2016
Apr 11, 2016
Apr 11, 2016

Repository files navigation

RedPitayaHelloWorldVHDL

Hello World code in VHDL for the Red Pitaya board

Luis Villaseñor

License: GPLv3

Date: 2016-03-11

Usage

Create a new project with Vivado (tested with Vivado v2015.4)

see http://www.xilinx.com/support/download.html

Add the code to a new project and proceed to run Synthesis, Implementation and Bitstream Generation

The *.bit file generated can be converted to *.bin format with the fpga_bit_to_bin.py script taken from

https://github.com/topic-embedded-products/meta-topic/blob/master/recipes-bsp/fpga/fpga-bit-to-bin

Transfer the HelloWorld.bin to the Red Pitaya and type

cat HelloWorld.bin > /dev/xdevcfg

The 8-bit LEDs will display a binary incremental counter at a rate of 1Hz

Reboot the Red Pitaya board to reinstall the permanent bitstream on the Zynq FPGA

About

Hello World code in VHDL for the Red Pitaya board

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Languages

  • VHDL 100.0%