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patches: add patch to fix WDR3600/4300 reboots
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patches/0001-ath79-add-cache-barrier-after-register-write.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,182 @@ | ||
| From bf175c712257ab28e9a884b84bc14056c4f9e101 Mon Sep 17 00:00:00 2001 | ||
| From: Grische <[email protected]> | ||
| Date: Wed, 10 Jan 2024 00:02:03 +0100 | ||
| Subject: [PATCH] ath79: add cache barrier after register write | ||
|
|
||
| --- | ||
| ...d-cache-barrier-after-register-write.patch | 116 ++++++++++++++++++ | ||
| ...d-cache-barrier-after-register-write.patch | 39 ++++++ | ||
| 2 files changed, 155 insertions(+) | ||
| create mode 100644 patches/openwrt/0016-ath79-add-cache-barrier-after-register-write.patch | ||
| create mode 100644 patches/openwrt/0017-fixup-th79-add-cache-barrier-after-register-write.patch | ||
|
|
||
| diff --git a/patches/openwrt/0016-ath79-add-cache-barrier-after-register-write.patch b/patches/openwrt/0016-ath79-add-cache-barrier-after-register-write.patch | ||
| new file mode 100644 | ||
| index 00000000..ccca5969 | ||
| --- /dev/null | ||
| +++ b/patches/openwrt/0016-ath79-add-cache-barrier-after-register-write.patch | ||
| @@ -0,0 +1,116 @@ | ||
| +From e89641a29e2222a9c95ef055fe7ed2f9903dbaa9 Mon Sep 17 00:00:00 2001 | ||
| +From: David Bauer <[email protected]> | ||
| +Date: Tue, 9 Jan 2024 22:26:06 +0100 | ||
| +Subject: [PATCH] ath79: add cache barrier after register write | ||
| + | ||
| +Add a cache-barrier after the reset-register write. This fixes spurious | ||
| +reboot issues on TP-Link WDR3600 and WDR4300 devices with Zental DDR2 | ||
| +DRAM chips. | ||
| + | ||
| +This issue was fixed in the past, but switching to the reset-driver | ||
| +specific implementation removed the cache barrier which was previously | ||
| +implicitly added by reading back the register in question. | ||
| + | ||
| +Link: https://github.com/freifunk-gluon/gluon/issues/2904 | ||
| +Link: https://github.com/openwrt/openwrt/issues/13043 | ||
| +Link: https://dev.archive.openwrt.org/ticket/17839 | ||
| + | ||
| +Signed-off-by: David Bauer <[email protected]> | ||
| +--- | ||
| + ...d-cache-barrier-after-register-write.patch | 38 +++++++++++++++++++ | ||
| + ...d-cache-barrier-after-register-write.patch | 38 +++++++++++++++++++ | ||
| + 2 files changed, 76 insertions(+) | ||
| + create mode 100644 target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| + create mode 100644 target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| + | ||
| +diff --git a/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch b/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +new file mode 100644 | ||
| +index 0000000000..fcde3cacf5 | ||
| +--- /dev/null | ||
| ++++ b/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +@@ -0,0 +1,38 @@ | ||
| ++From fbc43d5486c39b130fc2f0c26ecc1b95a02e2c59 Mon Sep 17 00:00:00 2001 | ||
| ++From: David Bauer <[email protected]> | ||
| ++Date: Tue, 9 Jan 2024 22:17:37 +0100 | ||
| ++Subject: [PATCH] reset: ath79: add cache barrier after register write | ||
| ++ | ||
| ++Add a cache-barrier after the reset-register write. This fixes spurious | ||
| ++reboot issues on TP-Link WDR3600 and WDR4300 devices with Zental DDR2 | ||
| ++DRAM chips. | ||
| ++ | ||
| ++This issue was fixed in the past, but switching to the reset-driver | ||
| ++specific implementation removed the cache barrier which was previously | ||
| ++implicitly added by reading back the register in question. | ||
| ++ | ||
| ++Link: https://github.com/freifunk-gluon/gluon/issues/2904 | ||
| ++Link: https://github.com/openwrt/openwrt/issues/13043 | ||
| ++Link: https://dev.archive.openwrt.org/ticket/17839 | ||
| ++Link: f8a7bfe1cb2c ("MIPS: ath79: fix system restart") | ||
| ++ | ||
| ++Signed-off-by: David Bauer <[email protected]> | ||
| ++--- | ||
| ++ drivers/reset/reset-ath79.c | 1 + | ||
| ++ 1 file changed, 1 insertion(+) | ||
| ++ | ||
| ++diff --git a/drivers/reset/reset-ath79.c b/drivers/reset/reset-ath79.c | ||
| ++index e48d8fcb3133..fc602925da66 100644 | ||
| ++--- a/drivers/reset/reset-ath79.c | ||
| +++++ b/drivers/reset/reset-ath79.c | ||
| ++@@ -37,6 +37,7 @@ static int ath79_reset_update(struct reset_controller_dev *rcdev, | ||
| ++ else | ||
| ++ val &= ~BIT(id); | ||
| ++ writel(val, ath79_reset->base); | ||
| +++ barrier(); | ||
| ++ spin_unlock_irqrestore(&ath79_reset->lock, flags); | ||
| ++ | ||
| ++ return 0; | ||
| ++-- | ||
| ++2.43.0 | ||
| ++ | ||
| +diff --git a/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch b/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +new file mode 100644 | ||
| +index 0000000000..fcde3cacf5 | ||
| +--- /dev/null | ||
| ++++ b/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +@@ -0,0 +1,38 @@ | ||
| ++From fbc43d5486c39b130fc2f0c26ecc1b95a02e2c59 Mon Sep 17 00:00:00 2001 | ||
| ++From: David Bauer <[email protected]> | ||
| ++Date: Tue, 9 Jan 2024 22:17:37 +0100 | ||
| ++Subject: [PATCH] reset: ath79: add cache barrier after register write | ||
| ++ | ||
| ++Add a cache-barrier after the reset-register write. This fixes spurious | ||
| ++reboot issues on TP-Link WDR3600 and WDR4300 devices with Zental DDR2 | ||
| ++DRAM chips. | ||
| ++ | ||
| ++This issue was fixed in the past, but switching to the reset-driver | ||
| ++specific implementation removed the cache barrier which was previously | ||
| ++implicitly added by reading back the register in question. | ||
| ++ | ||
| ++Link: https://github.com/freifunk-gluon/gluon/issues/2904 | ||
| ++Link: https://github.com/openwrt/openwrt/issues/13043 | ||
| ++Link: https://dev.archive.openwrt.org/ticket/17839 | ||
| ++Link: f8a7bfe1cb2c ("MIPS: ath79: fix system restart") | ||
| ++ | ||
| ++Signed-off-by: David Bauer <[email protected]> | ||
| ++--- | ||
| ++ drivers/reset/reset-ath79.c | 1 + | ||
| ++ 1 file changed, 1 insertion(+) | ||
| ++ | ||
| ++diff --git a/drivers/reset/reset-ath79.c b/drivers/reset/reset-ath79.c | ||
| ++index e48d8fcb3133..fc602925da66 100644 | ||
| ++--- a/drivers/reset/reset-ath79.c | ||
| +++++ b/drivers/reset/reset-ath79.c | ||
| ++@@ -37,6 +37,7 @@ static int ath79_reset_update(struct reset_controller_dev *rcdev, | ||
| ++ else | ||
| ++ val &= ~BIT(id); | ||
| ++ writel(val, ath79_reset->base); | ||
| +++ barrier(); | ||
| ++ spin_unlock_irqrestore(&ath79_reset->lock, flags); | ||
| ++ | ||
| ++ return 0; | ||
| ++-- | ||
| ++2.43.0 | ||
| ++ | ||
| +-- | ||
| +2.30.2 | ||
| + | ||
| diff --git a/patches/openwrt/0017-fixup-th79-add-cache-barrier-after-register-write.patch b/patches/openwrt/0017-fixup-th79-add-cache-barrier-after-register-write.patch | ||
| new file mode 100644 | ||
| index 00000000..78d2e3f1 | ||
| --- /dev/null | ||
| +++ b/patches/openwrt/0017-fixup-th79-add-cache-barrier-after-register-write.patch | ||
| @@ -0,0 +1,39 @@ | ||
| +From a8c7dd542233add32ddaa03b9d0a4fa031dac843 Mon Sep 17 00:00:00 2001 | ||
| +From: David Bauer <[email protected]> | ||
| +Date: Tue, 9 Jan 2024 22:49:34 +0100 | ||
| +Subject: [PATCH] fixup! ath79: add cache barrier after register write | ||
| + | ||
| +--- | ||
| + ...990-reset-ath79-add-cache-barrier-after-register-write.patch | 2 +- | ||
| + ...990-reset-ath79-add-cache-barrier-after-register-write.patch | 2 +- | ||
| + 2 files changed, 2 insertions(+), 2 deletions(-) | ||
| + | ||
| +diff --git a/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch b/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +index fcde3cacf5..2840322f34 100644 | ||
| +--- a/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| ++++ b/target/linux/ath79/patches-5.15/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +@@ -29,7 +29,7 @@ index e48d8fcb3133..fc602925da66 100644 | ||
| + else | ||
| + val &= ~BIT(id); | ||
| + writel(val, ath79_reset->base); | ||
| +-+ barrier(); | ||
| +++ mb(); | ||
| + spin_unlock_irqrestore(&ath79_reset->lock, flags); | ||
| + | ||
| + return 0; | ||
| +diff --git a/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch b/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +index fcde3cacf5..2840322f34 100644 | ||
| +--- a/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| ++++ b/target/linux/ath79/patches-6.1/990-reset-ath79-add-cache-barrier-after-register-write.patch | ||
| +@@ -29,7 +29,7 @@ index e48d8fcb3133..fc602925da66 100644 | ||
| + else | ||
| + val &= ~BIT(id); | ||
| + writel(val, ath79_reset->base); | ||
| +-+ barrier(); | ||
| +++ mb(); | ||
| + spin_unlock_irqrestore(&ath79_reset->lock, flags); | ||
| + | ||
| + return 0; | ||
| +-- | ||
| +2.30.2 | ||
| + | ||
| -- | ||
| 2.34.1 | ||
|
|