feat: external power circuit schematics

fossasia · Jun 21, 2020 · 631daa5 · 631daa5
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commit 631daa5
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Showing 23 changed files with 128,578 additions and 10,724 deletions.
diff --git a/schematics/3DModels/ESP01.STEP b/schematics/3DModels/ESP01.STEP
diff --git a/schematics/3DModels/Fuse.STEP b/schematics/3DModels/Fuse.STEP
diff --git a/schematics/3DModels/HC05.STEP b/schematics/3DModels/HC05.STEP
diff --git a/schematics/3DModels/SDCard.STEP b/schematics/3DModels/SDCard.STEP
diff --git a/schematics/3DModels/USBCable.STEP b/schematics/3DModels/USBCable.STEP
diff --git a/schematics/3DModels/USBPort.STEP b/schematics/3DModels/USBPort.STEP
diff --git a/schematics/Custom_Components.pretty/SPDT.kicad_mod b/schematics/Custom_Components.pretty/SPDT.kicad_mod
@@ -0,0 +1,24 @@
+(module SPDT (layer F.Cu) (tedit 5EEDC00B)
+  (fp_text reference REF** (at 0 4.064) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value SPDT (at 0 -3.81) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_poly (pts (xy -0.508 0.508) (xy -1.524 0.508) (xy -1.524 -0.508) (xy -0.508 -0.508)) (layer F.SilkS) (width 0.1))
+  (fp_line (start -0.508 -0.508) (end -0.508 0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start -1.524 -0.508) (end -0.508 -0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start 1.524 -0.508) (end -1.524 -0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start 1.524 0.508) (end 1.524 -0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start -1.524 0.508) (end 1.524 0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start -1.524 -0.508) (end -1.524 0.508) (layer F.SilkS) (width 0.12))
+  (fp_line (start 3.81 -2.794) (end 3.81 2.794) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.81 -2.794) (end 3.81 -2.794) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.81 2.794) (end 3.81 2.794) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.81 -2.794) (end -3.81 2.794) (layer F.SilkS) (width 0.12))
+  (pad 1 smd roundrect (at -3 -2) (size 1 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 2 smd roundrect (at 3 -2) (size 1 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 1 smd roundrect (at -3 2) (size 1 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 3 smd roundrect (at -1 2) (size 1 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 2 smd roundrect (at 1 2) (size 1 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+)
diff --git a/schematics/Custom_Components.pretty/SPDT_DIP.kicad_mod b/schematics/Custom_Components.pretty/SPDT_DIP.kicad_mod
@@ -0,0 +1,17 @@
+(module SPDT_DIP (layer F.Cu) (tedit 5EEF2929)
+  (fp_text reference REF** (at 2.9 0.9) (layer F.SilkS)
+    (effects (font (size 0.5 0.5) (thickness 0.1)))
+  )
+  (fp_text value SPDT_DIP (at 0 -2.032) (layer F.Fab)
+    (effects (font (size 0.5 0.5) (thickness 0.1)))
+  )
+  (fp_line (start -4.5 1.5) (end -4.5 -1.5) (layer F.SilkS) (width 0.12))
+  (fp_line (start -4.5 -1.5) (end 4.2 -1.5) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.2 -1.5) (end 4.2 1.5) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.2 1.5) (end -4.5 1.5) (layer F.SilkS) (width 0.12))
+  (pad 1 thru_hole circle (at -3 -0.875) (size 1 1) (drill 0.6) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 3 -0.875) (size 1 1) (drill 0.6) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at -3 0.875) (size 1 1) (drill 0.6) (layers *.Cu *.Mask))
+  (pad 3 thru_hole circle (at -1 0.875) (size 1 1) (drill 0.6) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 1 0.875) (size 1 1) (drill 0.6) (layers *.Cu *.Mask))
+)