PyHT4032L

Hantek 4032L logic analyzer python access.

Requirements

• Python 2.7.x

Supported drivers

• Hantek original Windows driver
• LibUSB on Windows (requires Python libusb1 wrapper and libusb-1.0.dll)
• LibUSB on Linux (requires Python libusb1 wrapper and libusb-1.0)

FPGA flash tools

• fpga_get_ver: get current FPGA version
• fpga_dump: dump FPGA bitstream to file
• fpga_upd: update FPGA bitstream from file

Known FPGA versions

• V0 found in LAs from years around 2013. Doesn't support external clocking. Bug: slowdowns at low sample rates. Bug: all-zero IN packets before first STATUS/DATA packet.
• V4303 from 29 Apr 2015. Supports external clocking, both bugs of V0 listed above are fixed.
• V4304 from 2 Mar 2018. No visible differences from V4303

See also

• Protocol description on Sigrok site
• FPGA loader sources
• Firmware collection